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This is information on a product in full production.

July 2013 DocID13405 Rev 5 1/34

STP08DP05

Low voltage 8-bit constant current LED sink with full outputs error

detection

Datasheet

production data

Features

• Low voltage power supply down to 3 V

• 8 constant current output channels

• Adjustable output current through external

resistor

• Short and open output error detection

• Serial data IN/parallel data OUT

• 3.3 V micro driver-able

• Output current: 5-100 mA

• 30 MHz clock frequency

• Available in high thermal efficiency TSSOP

exposed pad

• ESD protection 2.5 kV HBM, 200 V MM

Description

The STP08DP05 is a monolithic, low voltage, low

current power 8-bit shift register designed for LED

panel displays. The STP08DP05 contains a 8-bit

serial-in, parallel-out shift register that feeds a 8-

bitD-type storage register. In the output stage,

eight regulated current sources were designed to

provide 5-100 mA constant current to drive the

LEDs.

The STP08DP05 is backward compatible in the

functionality and footprint with STP8C/L596 and

extends its functionality with open and short

detection on the outputs. The detection circuit

checks 3 different conditions that can occur on

the output line: short to GND, short to V

or open

line. The data detection results are loaded in the

shift register and shifted out via the serial line

output.

The detection functionality is implemented without

increasing the pin number, through a secondary

function of the output enable and latch pin (DM1

and DM2 respectively), a dedicated logic

sequence allows the device to enter or leave from

detection mode. Through an external resistor,

users can adjust the STP08DP05 output current,

controlling in this way the light intensity of LEDs,

in addition, user can adjust LED’s brightness

intensity from 0% to 100% via OE/DM2

pin.

The STP08DP05 guarantees a 20 V output

driving capability, allowing users to connect more

LEDs in series. The high clock frequency,

30 MHz, also satisfies the system requirement of

high volume data transmission. The 3.3 V of

voltage supply is well useful for applications that

interface any micro from 3.3 V. Compared with a

standard TSSOP package, the TSSOP exposed

pad increases heat dissipation capability by a 2.5

factor.

DIP-16

TSSOP16

(Exposed pad)

SO-16

Table 1. Device summary

Order codes Package Packaging

STP08DP05B1R DIP-16 25 parts per tube

STP08DP05MTR SO-16 (Tape and reel) 2500 parts per reel

STP08DP05TTR TSSOP16 (Tape and reel) 2500 parts per reel

STP08DP05XTTR TSSOP16 exposed-pad (Tape and reel) 2500 parts per reel

www.st.com

Summary of content (34 pages)

PAGE 1
STP08DP05 Low voltage 8-bit constant current LED sink with full outputs error detection Datasheet - production data serial-in, parallel-out shift register that feeds a 8bitD-type storage register. In the output stage, eight regulated current sources were designed to provide 5-100 mA constant current to drive the LEDs.
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Contents STP08DP05 Contents 1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Pin connection and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Absolute maximum ratings . . . . . . . . . .
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STP08DP05 1 Summary description Summary description Table 2. Typical current accuracy Current accuracy Output voltage Output current Between bits Between ICs ±1.5% ±5% ≥1.3 V 1.1 20 to 100 mA Pin connection and description Figure 1. Connections diagram Note: The exposed pad should be electrically connected to a metal land electrically isolated or connected to ground. Table 3.
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Block diagram 2 STP08DP05 Block diagram Figure 2.
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STP08DP05 3 Maximum rating Maximum rating Stressing the device above the rating listed in the “absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 3.1 Absolute maximum ratings Table 4.
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Maximum rating 3.3 STP08DP05 Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Test conditions Min. Typ. Max. Unit 3.0 - 5.5 V - 20 V - 100 mA VDD Supply voltage VO Output voltage IO Output current OUTn IOH Output current SERIAL-OUT - +1 mA IOL Output current SERIAL-OUT - -1 mA VIH Input voltage 0.7VDD - VDD+0.3 V VIL Input voltage -0.3 - 0.
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STP08DP05 4 Electrical characteristics Electrical characteristics VDD = 3.3 V to 5 V, T = 25 °C, unless otherwise specified. Table 7. Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit VIH Input voltage high level 0.7 VDD VDD V VIL Input voltage low level GND 0.3 VDD V IOH Output leakage current VOH = 20 V 0.5 10 μA VOL Output voltage (Serial-OUT) IOL = 1 mA 0.03 0.4 V VOH Output voltage (Serial-OUT) IOH = -1 mA VOH - VDD =- 0.4V V VO = 0.
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Switching characteristics 5 STP08DP05 Switching characteristics VDD = 5 V, T = 25 °C, unless otherwise specified. Table 8. Switching characteristics Symbol Parameter Test conditions Min. Typ. Max. Propagation delay time, CLK-OUTn, LE\DM1 = H, OE\DM2 = L VDD = 3.3 V 36 46.8 tPLH1 VDD = 5 V 19 24.7 Propagation delay time, LE\DM1 -OUTn, OE\DM2 = L VDD = 3.3 V 38 49.4 tPLH2 VDD = 5 V 21 27.3 Propagation delay time, OE\DM2-OUTn, LE\DM1 = H VDD = 3.
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STP08DP05 6 Equivalent circuit and outputs Equivalent circuit and outputs Figure 3. OE/DM2 terminal Figure 4. LE/DM1 terminal Figure 5. CLK, SDI terminal Figure 6.
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Truth table and timing diagram STP08DP05 7 Truth table and timing diagram 7.1 Truth table Table 9. Truth table Clock LE/DM1 OE/DM2 SDI OUT0 ........ OUT0 ........ OUT7 SDO H L Dn Dn ..... Dn -5 ..... Dn -7 Dn -7 L L Dn + 1 No change Dn -7 H L Dn + 2 Dn +2 ..... Dn -3 ..... Dn -5 Dn -5 X L Dn + 3 Dn +2 ..... Dn -3 ..... Dn -5 Dn -5 X H Dn + 3 OFF Dn -5 Note: OUT0 to OUT7 = ON when Dn = H; OUT0 to OUT7 = OFF when Dn = L. 7.2 Timing diagram Figure 7.
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STP08DP05 Truth table and timing diagram Figure 8. Clock, serial-in, serial-out Figure 9.
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Truth table and timing diagram STP08DP05 Figure 10.
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STP08DP05 8 Typical characteristics Typical characteristics Figure 11. Output current-REXT resistor TA = 25 °C, Vdrop = 0.3 V; 1.2 V, Iset = 3 mA; 5 mA; 10 mA; 20 mA; 50 mA; 80 mA, Max Table 10.
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Typical characteristics STP08DP05 Figure 12. ISET vs drop out voltage (VDROP) 910 810 Vdrop (mV) 710 610 Vdd 5.0V Vdd 3.0V 510 410 310 210 110 10 0 10 20 30 40 50 60 70 80 90 100 110 Iset (mA) Table 11. ISET vs drop out voltage (VDROP) Vdd (V) 3 5 14/34 I set (mA) Rext (Ω) Vdrop min (mV) Vdrop max (mV) Vdrop AVG (mV) 3 6470 30.6 31.2 30.93 5 3930 46.5 52.9 48.63 10 1910 80.9 100 82.26 20 963 150 161 157 50 386 392 396 394.3 80 241 636 646 640.
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STP08DP05 Typical characteristics Figure 13. Power dissipation vs temperature package Note: The exposed-pad should be soldered to the PBC to realize the thermal benefits.
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Test circuit 9 STP08DP05 Test circuit Figure 14. DC characteristics Figure 15.
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STP08DP05 Test circuit Figure 16.
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Detection mode functionality STP08DP05 10 Detection mode functionality 10.1 Phase one: “entering in detection mode“ From the “normal mode” condition the device can switch to the “error mode” by a logic sequence on the OE/DM2 and LE/DM1 pins as showed in the following table and diagram: Table 12. Entering in detection truth table CLK 1° 2° 3° 4° 5° OE/DM2 H L H H H LE/DM1 L L L H L Figure 17.
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STP08DP05 10.2 Detection mode functionality Phase two: “error detection“ The eight data bits must be set “1” in order to set ON all the outputs during the detection. The data are latched by LE/DM1 and after that the outputs are ready for the detection process. When the micro controller switches the OE/DM2 to LOW, the device drives the LEDs in order to analyze if an OPEN or SHORT condition has occurred. Figure 18.
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Detection mode functionality 10.3 STP08DP05 Phase three: “resuming to normal mode” The sequence for re-entering in normal mode is showed in the following table and diagram: Table 13. Resuming to normal mode timing diagram CLK 1° 2° 3° 4° 5° OE/DM2 H L H H H LE/DM1 L L L L L Figure 19.
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STP08DP05 10.4 Detection mode functionality Error detection conditions VDD = 3.3 to 5 V temperature range 25 °C. Table 14. Detection condition Note: SW-1 or SW-3b Open line or output No error ==> IODEC ≤ 0.5 x IO short to GND detected detected ==> IODEC ≥ 0.5 x IO SW-2 or SW-3a Short on LED or short ==> VO ≥ 2.5V to V-LED detected ==> VO ≤ 2.2 V No error detected Where: IO = the output current programmed by the REXT, IODEC = the detected output current in detection mode. Figure 20.
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Package mechanical data 11 STP08DP05 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 15. DIP16 mechanical data mm Dim. Min. a1 0.51 B 0.77 Typ. 1.65 b 0.5 b1 0.25 D 20 E 8.5 e 2.54 e3 17.78 F 7.1 I 5.1 L 3.
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STP08DP05 Package mechanical data Figure 21.
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Package mechanical data STP08DP05 Table 16. HTSSOP16 exposed pad mechanical data (mm) Dim. Min. Max. A 1.20 A1 0.15 A2 0.80 b 0.19 0.30 c 0.09 0.20 D 4.90 5.00 5.10 D1 2.8 3 3.2 E 6.20 6.40 6.60 E1 4.30 4.40 4.50 E2 2.8 3 3.2 e L k 1.00 1.05 0.65 0.45 L1 0.60 0.75 1.00 0.00 aaa 24/34 Typ. 8.00 0.
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STP08DP05 Package mechanical data Figure 22.
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Package mechanical data STP08DP05 Table 17. HTSSOP16 mechanical data (mm) Dim. Min. Max. A 1.20 A1 0.15 A2 0.80 b 0.19 0.30 c 0.09 0.20 D 4.90 5.00 5.10 D1 2.8 3 3.2 E 6.20 6.40 6.60 E1 4.30 4.40 4.50 E2 2.8 3 3.2 e L k 1.00 1.05 0.65 0.45 L1 0.60 0.75 1.00 0.00 aaa 26/34 Typ. 8.00 0.
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STP08DP05 Package mechanical data Figure 23.
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Package mechanical data STP08DP05 Table 18. SO16N dimensions mm Dim. Min. Typ. A 1.75 A1 0.10 0.25 A2 1.25 b 0.31 0.51 c 0.17 0.25 D 9.80 9.90 10.00 E 5.80 6.00 6.20 E1 3.80 3.90 4.00 e 1.27 h 0.25 0.50 L 0.40 1.27 k 0 8° ccc 28/34 Max. 0.
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STP08DP05 Package mechanical data Figure 24.
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Package mechanical data STP08DP05 Figure 25.
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STP08DP05 12 Packaging mechanical data Packaging mechanical data Table 19. HTSSOP16 EP tape and reel mechanical data (mm) Dim. Min. A Typ. Max. 330 C 12.8 D 20.2 N 60 T 13.2 22.4 Ao 6.7 6.9 Bo 5.3 5.5 Ko 1.6 1.8 Po 3.9 4.1 P 7.9 8.
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Packaging mechanical data STP08DP05 Figure 26.
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STP08DP05 13 Revision history Revision history Table 20. Document revision history Date Revision Changes 3-Apr-2007 1 First release 21-May-2007 2 Updated Table 7 on page 7 08-Aug-2008 3 Updated Section 8: Typical characteristics on page 13 added Figure 12 and Figure 11 on page 14 updated Figure 13 on page 15 22-Oct-2009 4 Updated Note: on page 3 29-Jul-2013 5 Updated Section 11: Package mechanical data, Figure 3: OE/DM2 terminal and Figure 4: LE/DM1 terminal.
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STP08DP05 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.