Datasheet

Block description STOTG04E
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6 Block description
The STOTG04 integrates a charge pump and comparators for the V
BUS
, ID line detector and interrupt
switch, differential data driver, differential and single-ended receivers, low dropout voltage regulator and
control logic. The STOTG04 provides a complete solution for connection of a digital USB OTG controller
to the physical Universal Serial Bus.
6.1 Charge pump
The V
BUS
line voltage is provided using the internal charge pump. It is capable of sourcing up to 35mA
load current. The charge pump can be powered by voltage from 2.7V to 5.5V. It needs two capacitors for
its operation: an external capacitor of 220nF connected between the CAP1 and CAP2 pins and a 4.7µF
decoupling tank capacitor on the V
BUS
. If an application needs current that is higher than 35mA, an
external charge pump or a switch controlled by the ADR_PSW pin may be used.
6.2 V
BUS
Comparators
These comparators monitor the V
BUS
voltage. They provide current status information for the V
BUS
line.
V
BUS
valid status means that the voltage is above V
BUS_VLD
. Session valid status means that the V
BUS
voltage is above V
SES_VLD
level.
6.3 Voltage regulator
An internal low-dropout voltage regulator provides power for the bus drivers and receivers. The regulator
needs an external capacitor of 1µF on the V
TRM
pin for proper operation. The regulator can provide 3.3V
or 2.75V output voltages according to 2V7_en bit in Control Register 3.
The regulator can be bypassed by tying the V
TRM
pin to the V
BAT
power supply voltage when the analog
supply voltage is in the range of 3.0V (or 2.7V) to 3.6V.
6.4 ID Line detector
This block senses ID line status. It is capable of detecting three different line states:
• pin floating;
• pin tied to ground;
• pin grounded via a 140kΩ resistor.
The ID detector can also generate an interrupt by shorting the pin to ground.
6.5 Driver and receivers
The driver can operate in several different modes. It can act as a simple low-speed and full-speed
differential USB driver, as two independent single-ended drivers in the UART mode, or as an open-drain
driver in the I
2
C mode.
This block contains one differential receiver for the USB operation mode and two single-ended receivers
for USB signaling as well as UART and I
2
C receivers.