Datasheet

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October 2006 Rev. 3 1/26

STOTG04E

USB-OTG Full-speed Transceiver

Feature summary

■ Meets USB specification Rev. 2.0 And on-the-

go supplement to the USB 2.0 specification

■ Analog car kit-compatible

■ Four operating modes: USB, I

C, UART and

Audio

■ Configurable using I

C serial interface

■ Capable of 12Mbit/s full-speed and 1.5Mbit/s

low-speed modes of operation

■ Standard digital interface compliant with the

OTG transceiver specification

■ Supports the session request protocol (SRP)

and host negotiation protocol (HNP)

■ 35mA typical V

BUS

charge pump output current

for 3.3V supply voltage

■ Ability to control external charge pump for

higher VBUS currents

■ Integrated pull-up/-down resistors

■ ±6kV ESD Protection on all USB pins (contact

discharge)

■ +1.6V to +3.6V Digital power supply and +2.7V

to +5.5V analog supply voltage range

■ Power-down mode with very low power

consumption for battery powered devices

Applications

■ Mobile phones

■ PDAs

■ MP3 players

■ Digital cameras

■ Printers

Description

The STOTG04 is a USB On-The-Go full-speed

transceiver. It provides complete physical layer

(PHY) solution for any USB-OTG device. It

contains V

BUS

charge pump and comparators, ID

line detector and interrupt generator, and the USB

differential driver and receivers. The STOTG04

transceiver is suitable for mobile and battery

powered devices because of its low power

consumption and power-down operating mode.

The transceiver is capable of operation in several

different modes. It can operate in basic USB-OTG

mode, as an I

C and UART transceiver, or in

audio mode. Behavior of the transceiver is fully

configurable through the two-wire I

C serial bus.

The transceiver supports session request protocol

and host negotiation protocol.

The applications are mobile phones, PDAs, MP3

players, printers and digital cameras.

www.st.com

QFN24 (4mmx4mm)

Order code

Part number Package Packaging

STOTG04EQTR QFN24 (4mm x 4mm) 4000 parts per reel

Summary of content (26 pages)

PAGE 1
STOTG04E USB-OTG Full-speed Transceiver Feature summary ■ Meets USB specification Rev. 2.0 And on-thego supplement to the USB 2.0 specification ■ Analog car kit-compatible ■ Four operating modes: USB, I2C, UART and Audio ■ Configurable using I2C serial interface ■ Capable of 12Mbit/s full-speed and 1.
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STOTG04E Contents Contents 1 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Charge pump characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Timing diagrams . . . . . . . . . . .
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STOTG04E 1 Pin configuration Pin configuration Figure 1. Pin connections (Bottom View ) Table 1.
PAGE 4
STOTG04E Pin configuration PlN N° SYMBOL I/O 20 21 22 23 24 VBAT CAP1 CAP2 CGND VIF Power I/O I/O Power Power NAME AND FUNCTION Analog power supply voltage (+2.7V to +5.5V) External capacitor pin for the charge pump External capacitor pin for the charge pump Ground for the charge pump Logic power supply (+1.6V to 3.6V) (1) Input and open-drain output (2) Input with internal pull-up resistor (3) Internal regulator can be bypassed by connecting VBAT to this pin when the VBAT is in range of 2.7V to 3.
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STOTG04E 2 Maximum ratings Maximum ratings Table 2. Absolute maximum ratings Symbol VIF VBAT VDCDIG TSTG VESD Parameter Value Unit Logic Supply Voltage -0.5 to + 4.5 V Analog Supply Voltage -0.5 to + 6.5 V DC Input Voltage on any logic interface pin -0.5 to + 4.5 V Storage Temperature Range Electrostatic discharge voltage on USB pins -65 to + 150 ±8 ±6 °C Human Body Model Contact Discharge (*) kV (*) In accordance to IEC61000-4-2, level 3.
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STOTG04E Electrical characteristics 3 Electrical characteristics Table 6. Symbol IIF IBAT Electrical characteristics Characteristics measured over recommended operating conditions unless otherwise is noted. All typical values are referred to TA = 25°C, VIF = 1.8V, VBAT = 3.3V, RS = 20Ω, CEXT = 220nF, CT = 4.7µF and CTRM = 1µF Parameter Digital Part Supply Current Operating Supply Current Test Conditions Min.
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STOTG04E Symbol Electrical characteristics Parameter Test Conditions Min. Typ. 8 16 Max. Unit DIFFERENTIAL DRIVER ZDRV Output Impedance 24 Ω RLH = 14.25kΩ, VTRM = 3.3V 2.8 3.6 V RLH = 14.25kΩ, VTRM = 2.7V 2.6 3.0 V 0 0.3 V 2.0 V 200 mV 2.0 2.0 V Excluding external RS VOH_DRV HIGH level output voltage VOL_DRV LOW level output voltage RLL = 1.425kΩ VCRS Driver crossover voltage CLOAD = 50 to 600pF 1.3 1.
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STOTG04E Electrical characteristics Table 7. Switching characteristics Over recommended operating conditions unless otherwise is noted. All the typical values are referred to TA = 25°C, VIF = 1.8V, VBAT = 3.3V, RS = 20Ω, CEXT = 220nF, CT = 4.7µF, and CTRM = 1µF Symbol Parameter TVBUS_RISE VBUS rise time Test Conditions Min. ILOAD = 8mA, CT = 10µF Typ. Max.
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STOTG04E Symbol tIICF tSU_STA tHD_STA tSU_DAT tHD_DAT tSU_STO tBUF Electrical characteristics Parameter Test Conditions Fall time of both SDA and SCL signals Setup time for a repeated START condition Hold time for the START and repeated START conditions Data setup time Data hold time Setup time for the STOP condition Bus free time between a STOP and START condition Min. Typ. Max. Unit 300 ns 4.7 µs 4.0 µs 250 ns 0 µs 4.0 µs 4.
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STOTG04E Charge pump characteristics 4 Charge pump characteristics Figure 3. 10/26 Output characteristics Figure 4.
PAGE 11
STOTG04E 5 Timing diagrams Timing diagrams Figure 5. Rise and fall times Figure 6. Differential driver propagation delay Figure 7.
PAGE 12
STOTG04E Timing diagrams Figure 8. Output enable setup time t SET_OE V IH OE_TP_INT/ V IL V IH DAT_VP SE0_VM USB Idle State Data to Transmit V IL Figure 9. Bus turnaround time tTA_OI VIH OE_TP_INT/ tTA_IO VIL VIH DAT_VP SE0_VM output input output VIL Figure 10.
PAGE 13
STOTG04E Timing diagrams Figure 11.
PAGE 14
Block description 6 STOTG04E Block description The STOTG04 integrates a charge pump and comparators for the VBUS, ID line detector and interrupt switch, differential data driver, differential and single-ended receivers, low dropout voltage regulator and control logic. The STOTG04 provides a complete solution for connection of a digital USB OTG controller to the physical Universal Serial Bus. 6.1 Charge pump The VBUS line voltage is provided using the internal charge pump.
PAGE 15
STOTG04E 6.6 Block description Control logic This block controls the behavior of whole chip. It communicates with the external environment via the I2C serial bus. The control logic block consists of I2C slave interface, configuration and status registers, and some glue logic. 6.7 Modes of operation The STOTG04 can operate in two different power modes and in three operating modes. They can be controlled by logic signals and control registers. 6.7.
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STOTG04E Block description direction is controlled by bidi_en Bit of Control Register 3 (described later). When these signals are bidirectional, the direction is controlled by the OE_TP_INT/ signal (see Tables 11 and 12). The actual mode of operation is controlled by the dat_se0 Bit of Control Register 1 (see Tables 11 and 12) Table 11. DAT_SE0 (dat_se0 = 1) bidi_en OE/* 0 1 X 1 0 Table 12.
PAGE 17
STOTG04E Table 15. Block description UART Drivers direction bdir[1] bdir[0] DAT_VP ↔ D+ SE0_VM ↔ D- 0 0 1 1 0 1 0 1 → → ← ← → ← → ← 6.7.4 Audio mode In this mode the transceiver has to release all of its drivers and pull-up/pull-down resistors on the D+, Dand ID pins, leaving them in a high impedance state. This allows these lines to be used for transmission of audio signals. The transceiver should not provide voltage on its VBUS output in this mode.
PAGE 18
STOTG04E Block description Table 18.
PAGE 19
STOTG04E Table 21.
PAGE 20
STOTG04E Block description Figure 12. Basic operation of the I2C Bus Start condition is identified by a falling edge of the SDA signal while the SCL is stable at high level. The start condition must precede any data transfer on the bus. Stop condition is identified by a rising edge of the SDA signal while the SCL is stable at high level. The stop condition terminates any communication between device and master. The acknowledge bit is used to indicate a successful byte transfer.
PAGE 21
STOTG04E 6.12 Block description External charge pump switch The ADR_PSW pin has two functions. State of this pin is always latched into a register on the rising edge of the RESET/ signal. The latched value is used as a least significant bit of the I2C address. After the address is latched, this pin can be set as an output by setting the PSW_EN bit of the Control Register 3. Output value of the pin can be controlled by the VBUS_DRV bit of the Control Register 2.
PAGE 22
Package mechanical data 7 STOTG04E Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark.
PAGE 23
STOTG04E Package mechanical data QFN24 (4x4) MECHANICAL DATA mm. mils DIM. MIN. TYP A MAX. MIN. TYP. 1.00 MAX. 39.4 A1 0.00 0.05 0.0 2.0 b 0.18 0.30 7.1 11.8 D 3.9 4.1 153.5 161.4 D2 1.95 2.25 76.8 88.6 E 3.9 4.1 153.5 161.4 E2 1.95 2.25 76.8 88.6 e L 0.50 0.40 19.7 0.60 15.7 23.
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STOTG04E Package mechanical data Tape & Reel QFNxx/DFNxx (4x4) MECHANICAL DATA mm. inch DIM. MIN. TYP A MIN. TYP. 330 C 12.8 D 20.2 N 99 13.2 MAX. 12.992 0.504 0.519 0.795 101 T 24/26 MAX. 3.898 3.976 14.4 0.567 Ao 4.35 0.171 Bo 4.35 0.171 Ko 1.1 0.043 Po 4 0.157 P 8 0.
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STOTG04E 8 Revision history Revision history Table 22. Revision history Date Revision Changes 13-Jan-2006 1 First Release. 01-Feb-2006 2 Mistake on Table 1. 17-Oct-2006 3 Added details in paragraph 6.7.1, comments to table 19 and description in paragraph 6.12.
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STOTG04E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.