Datasheet

Functional pin description STNS01
12/29 DocID024654 Rev 2
7 Functional pin description
Pin 1: IN
5 V input supply voltage. This pin supplies power to the SYS pin and the battery charger
when the input voltage is higher than V
UVLO
and lower than V
INOVP
. Bypass this pin to GND
with a 2.2 μF ceramic capacitor.
Pin 2: SYS
LDO input voltage. This pin can be used to supply up to 100 mA to external devices. The
voltage source of this pin can be either IN or BAT depending on the operating conditions.
Refer to Table 7 for more details. Bypass this pin to GND with a 2.2 μF ceramic capacitor.
Pin 3: LDO
LDO output voltage. This pin outputs a 3.1 V regulated voltage and can supply up to 100
mA. Bypass this pin to GND with a 1 μF ceramic capacitor.
Pin 4: SD
Shutdown input. A logic high level on this pin when the input voltage (V
IN
) is not valid makes
the device enter shutdown mode. In this mode the battery drain is reduced to less than 500
nA and the SYS and LDO voltages are not present. Connecting a valid input voltage
(V
UVLO
<V
IN
<V
INOVP
) restores normal operating conditions if the battery voltage is higher
than V
ODCR
.
If the device is in shutdown mode and the battery voltage is lower than V
ODCR
, when a valid
input voltage is connected and then disconnected again, the STNS01 doesn't exit shutdown
mode (see Figure 16).
This pin has an internal 500 kΩ pull-down resistor.
Table 7. SYS pin voltage
V
IN
V
BAT
V
SYS
LDO
> V
UVLO
& < V
INOVP X
(don’t care)
V
IN
(1)
1. Voltage drop over internal MOSFETs not included.
ON
< V
UVLO
< V
ODC
(2)
2. V
ODCR
if shutdown mode or overdischarge protection has been previously activated.
Not powered OFF
< V
UVLO
> V
ODC
(2)
V
BAT
(1)
ON
> V
INOVP
< V
ODC
(2)
Not powered OFF
> V
INOVP
> V
ODC
(2)
V
BAT
(1)
ON