Datasheet

STMPE811 I2C interface
Doc ID 14489 Rev 6 13/65
4.2 Data input
The device samples the data input on SDATA on the rising edge of the SCLK. The SDATA
signal must be stable during the rising edge of SCLK and the SDATA signal must change
only when SCLK is driven low.
Figure 6. Read and write modes (random and sequential)
Table 8. Operating modes
Mode Byte Programming sequence
Read ≥1
Start, Device address, R/W
= 0, Register address to be read
Restart, Device address, R/W
= 1, Data Read, Stop
If no Stop is issued, the Data Read can be continuously performed. If
the register address falls within the range that allows an address auto-
increment, then the register address auto-increments internally after
every byte of data being read.
Write ≥1
Start, Device address, R/W
= 0, Register address to be written, Data
Write, Stop
If no Stop is issued, the Data Write can be continuously performed. If
the register address falls within the range that allows address auto-
increment, then the register address auto-increments internally after
every byte of data being written in. For those register addresses that
fall within a non-incremental address range, the address is kept static
throughout the entire write operation. Refer to the memory map table
for the address ranges that are auto and non-increment.
Start
R/W=0
Ack
Device
Address
Reg
Address
Ack
Device
Address
Ack
R/W=1
Data
Read
No Ack
Stop
One byte
Read
Start
R/W=0
Ack
Device
Address
Reg
Address
Ack
Restart
Device
Address
Ack
R/W=1
Data
Read
Ack
More than one byte
Read
Ack
No Ack
Stop
Data
Read + 1
Data
Read + 2
Start
R/W=0
Ack
Device
Address
Reg
Address
Ack
Data
to be
written
Ack
Stop
One byte
Write
More than one byte
Read
Start
R/W=0
Ack
Device
Address
Reg
Address
Ack
Data to
Write
Ack
Stop
Data to
Write + 2
Ack
Ack
Data to
Write + 1
Master
Slave
AM00775V1