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September 2011 Doc ID 14489 Rev 6 1/65

STMPE811

S-Touch

advanced resistive touchscreen controller

with 8-bit GPIO expander

Features

■ 8 GPIOs

■ 1.8 - 3.3 V operating voltage

■ Integrated 4-wire touchscreen controller

■ Interrupt output pin

■ Wakeup feature on each I/O

■ SPI and I

C interface

■ Up to 2 devices sharing the same bus in

C mode (1 address line)

■ 8-input 12-bit ADC

■ 128-depth buffer touchscreen controller

■ Touchscreen movement detection algorithm

■ 25 kV air-gap ESD protection (system level)

■ 4 kV HBM ESD protection (device level)

Applications

■ Portable media players

■ Game consoles

■ Mobile and smartphones

■ GPS

Description

The STMPE811 is a GPIO (general purpose

input/output) port expander able to interface a

main digital ASIC via the two-line bidirectional bus

C). A separate GPIO expander is often used in

mobile multimedia platforms to solve the

problems of the limited amount of GPIOs typically

available on the digital engine.

The STMPE811 offers great flexibility, as each I/O

can be configured as input, output or specific

functions. The device has been designed with

very low quiescent current and includes a wakeup

feature for each I/O, to optimize the power

consumption of the device.

A 4-wire touchscreen controller is built into the

STMPE811. The touchscreen controller is

enhanced with a movement tracking algorithm (to

avoid excessive data), a 128 x 32 bit buffer and

programmable active window feature.

QFN16

(3x3)

Table 1. Device summary

Order code Package Packaging

STMPE811QTR QFN16 Tape and reel

www.st.com

Summary of content (65 pages)

PAGE 1
STMPE811 S-Touch® advanced resistive touchscreen controller with 8-bit GPIO expander Features ■ 8 GPIOs ■ 1.8 - 3.
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Contents STMPE811 Contents 1 STMPE811 functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Pin configuration and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 3 I2C and SPI interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1 4 5 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Interface selection . . . . . . . . . . . . . .
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STMPE811 Contents 11 Touchscreen controller programming sequence . . . . . . . . . . . . . . . . . 46 12 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 13 GPIO controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 14 13.0.1 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 13.0.2 Power-up reset (POR) . . . . . . . . . . . . . . . . . . . .
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List of tables STMPE811 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. 4/65 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin assignments . . . . . . . . . . . . . . . . . . . . . .
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STMPE811 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. STMPE811 functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 STMPE811 pin configuration (top through view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 STMPE811 interface. . . . . . . . . . . . . . . . . . . . . . . . .
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STMPE811 functional overview 1 STMPE811 STMPE811 functional overview The STMP811 consists of the following blocks: ● I2C and SPI interface ● Analog-to-digital converver (ADC) ● Touchscreen controller (TSC) ● Driver and switch control unit ● Temperature sensor ● GPIO controller Figure 1.
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STMPE811 2 Pin configuration and functions Pin configuration and functions Figure 2. STMPE811 pin configuration (top through view) 12 11 10 9 13 8 14 7 STMPE811 15 6 16 5 1 Table 2.
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Pin configuration and functions 2.1 STMPE811 Pin functions The STMPE811 is designed to provide maximum features and flexibility in a very small pincount package. Most of the pins are multi-functional. Table 3 and Table 4 show how to select the pin’s function. Table 3.
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STMPE811 I2C and SPI interface 3 I2C and SPI interface 3.1 Interface selection The STMPE811 interfaces with the host CPU via a I2C or SPI interface. The pin IN_1 allows the selection of interface protocol at reset state. Figure 3. STMPE811 interface DIN SPI I/F module DOUT CLK CS MUX unit I2C I/F module Table 5.
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I2C interface 4 STMPE811 I2C interface The addressing scheme of STMPE811 is designed to allow up to 2 devices to be connected to the same I2C bus. Figure 4. STMPE811 I2C interface GND VCC SCLK SCLK SDAT SDAT STMPE811 ADDR0 Table 6. I2C address ADDR0 Address 0 0 x 82 1 0 x 88 For the bus master to communicate to the slave device, the bus master must initiate a Start condition and be followed by the slave device address. Accompanying the slave device address, is a read/write bit (R/W).
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STMPE811 I2C interface Table 7. I2C timing Symbol Parameter Min Typ Max Uni 0 − 400 kHz fSCL SCL clock frequency tLOW Clock low period 1.
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I2C interface 4.1 STMPE811 I2C features The features that are supported by the I2C interface are listed below: ● I2C slave device ● Operates at 1.8 V ● Compliant to Philips I2C specification version 2.1 ● Supports standard (up to 100 Kbps) and fast (up to 400 Kbps) modes Start condition A Start condition is identified by a falling edge of SDATA while SCLK is stable at high state. A Start condition must precede any data/command transfer.
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STMPE811 Data input The device samples the data input on SDATA on the rising edge of the SCLK. The SDATA signal must be stable during the rising edge of SCLK and the SDATA signal must change only when SCLK is driven low. Table 8. Operating modes Mode Byte Programming sequence Start, Device address, R/W = 0, Register address to be read Restart, Device address, R/W = 1, Data Read, Stop ≥1 Read If no Stop is issued, the Data Read can be continuously performed.
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I2C interface 4.3 STMPE811 Read operation A write is first performed to load the register address into the Address Counter but without sending a Stop condition. Then, the bus master sends a reStart condition and repeats the Device Address with the R/W bit set to 1. The slave device acknowledges and outputs the content of the addressed byte. If no additional data is to be read, the bus master must not acknowledge the byte and terminates the transfer with a Stop condition.
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STMPE811 5 SPI interface SPI interface The SPI (serial peripheral interface) in STMPE811 uses a 4-wire communication connection (DATA IN, DATA OUT, CLK, CS). In the diagram, “Data in” is referred to as MOSI (master out slave in) and “DATA out” is referred to as MISO (master in slave out). 5.1 SPI protocol definition The SPI follows a byte-sized transfer protocol. All transfers begin with an assertion of CS_n signal (falling edge).
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SPI interface 5.1.2 STMPE811 Register write The following steps need to be followed for register write through SPI. 5.1.3 1. Assert CS_n by driving a '0' on this pin. 2. Drive a '0' on the first SCL launch clock on MOSI to select a write operation. 3. The next 7 bits on MOSI denote the 7-bit register address (MSB first). 4. The next byte on the MOSI denotes data to be written. 5. The following transmissions on MOSI are considered byte-sized data.
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STMPE811 5.2 SPI interface SPI timing modes The SPI timing modes are defined by CPHA and CPOL,CPHA and CPOL are read from the "SDAT" and "A0" pins during power-up reset. The following four modes are defined according to this setting. Table 9. SPI timing modes CPOL_N (SDAT pin) CPOL CPHA (ADDR pin) Mode 1 0 0 0 1 0 1 1 0 1 0 2 0 1 1 3 The clocking diagrams of these modes are shown in ON reset. The device always operates in mode 0.
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SPI interface STMPE811 Table 10. SPI timing specification (continued) Timing Symbol tCSCL CS_n high to first clock edge tCSZ CS_n high to tri-state on MISO Figure 7.
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STMPE811 6 STMPE811 registers STMPE811 registers This section lists and describes the registers of the STMPE811 device, starting with a register map and then provides detailed descriptions of register types. Table 11.
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STMPE811 registers Table 11.
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STMPE811 STMPE811 registers Table 11.
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System and identification registers STMPE811 7 System and identification registers Table 12.
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STMPE811 System and identification registers CHIP_ID Device identification Address: 0x00 Type: R Reset: 0x0811 Description: 16-bit device identification ID_VER Revision number Address: 0x02 Type: R Reset: 0x03 (0x01 for engineering samples) Description: 16-bit revision number SYS_CTRL1 7 Reset control 6 5 4 3 2 RESERVED Address: 0x03 Type: R/W Reset: 0x00 Description: 1 0 SOFT_RESET HIBERNATE The reset control register enables to reset the device [7:2] RESERVED [1] SO
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System and identification registers STMPE811 [1] TSC_OFF: Switch off the clock supplyto the touchscreen controller 1: Switches off the clock supply to the touchscreen controller [0] ADC_OFF: Switch off the clock supply to the ADC 1: Switches off the clock supply to the ADC SPI_CFG 7 SPI interface configuration 6 5 4 3 RESERVED Address: 0x08 Type: R/W Reset: 0x01 Description: 2 1 0 AUTO_INCR SPI_CLK_MOD1 SPI_CLK_MOD0 SPI interface configuration register [7:3] RESERVED [2] AUTO_INCR: Thi
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STMPE811 8 Interrupt system Interrupt system The STMPE811 uses a 2-tier interrupt structure. The ADC interrupts and GPIO interrupts are ganged as a single bit in the “interrupt status register”. The interrupts from the touchscreen controller and temperature sensor can be seen directly in the interrupt status register. Figure 8.
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Interrupt system STMPE811 INT_CTRL 7 Interrupt control register 6 5 4 3 RESERVED 2 1 0 INT_POLARITY INT_TYPE GLOBAL_INT Address: 0x09 Type: R/W Reset: 0x00 Description: The interrupt control register is used to enable the interruption from a system-related interrupt source to the host.
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STMPE811 Interrupt system Address: 0x0B Type: R Reset: 0x10 Description: The interrupt status register monitors the status of the interruption from a particular interrupt source to the host. Regardless of whether the INT_EN bits are enabled, the INT_STA bits are still updated. Writing '1' to this register clears the corresponding bits. Writing '0' has no effect.
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Interrupt system STMPE811 The ISG[7:0] bits are the interrupt status bits corresponding to the GPIO[7:0] pins. Writing '1' to this register clears the corresponding bits. Writing '0' has no effect. [7:0] ISG[x]: GPIO interrupt status (where x = 7 to 0) Read: Interrupt status of the GPIO[x].
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STMPE811 9 Analog-to-digital converter Analog-to-digital converter An 8-input,12-bit analog-to-digital converter (ADC) is integrated in the STMPE811. The ADC can be used as a generic analog-to-digital converter, or as a touchscreen controller capable of controlling a 4-wire resistive touchscreen. Table 13.
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Analog-to-digital converter STMPE811 ADC_CTRL1 ADC control 1 7 RESERVED 6 5 4 SAMPLE_TIME2 SAMPLE_TIME1 SAMPLE_TIME0 Address: 0x20 Type: R/W Reset: 0x1C Description: ADC control register.
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STMPE811 Analog-to-digital converter [1:0] ADC_FREQ: Selects the clock speed of ADC 00: 1.625 MHz typ. 01: 3.25 MHz typ. 10: 6.5 MHz typ. 11: 6.5 MHz typ. ADC channel data capture ADC_CAPT 7 6 5 4 3 2 1 0 CH[7:0] Address: 0x22 Type: R/W Reset: 0xFF Description: To initiate ADC data acquisition. [7:0] CH[7:0]: ADC channel data capture Write '1' to initiate data acquisition for the corresponding channel. Writing '0' has no effect. Reads '1' if conversion is completed.
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Analog-to-digital converter Table 14. 32/65 STMPE811 ADC conversion time Sample time setting Conversion time 6.5 MHz 3.25 MHz 1.625 MHz in ADC clock (154 ns) (308 ns) (615 ns) 100 80 12.3 µs(81.5 kHz) 24.6 µs (41 kHz) 49.2 µs (20 kHz) 101 96 14.8 µs (67.6 kHz) 28.8 µs (33 kHz) 59.2 µs (17 kHz) 110 124 19.1 µs (52.3 kHz) 38.2 µs (26 kHz) 56.
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STMPE811 10 Touchscreen controller Touchscreen controller The STMPE811 is integrated with a hard-wired touchscreen controller for 4-wire resistive type touchscreen. The touchscreen controller is able to operate completely autonomously, and interrupt the connected CPU only when a pre-defined event occurs. Figure 9. Touchscreen controller block diagram Movement & window tracking 10/12 bit ADC s FIFO FIFO & interrupt control 10.
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Touchscreen controller STMPE811 Window tracking The -WDW_X and WDW_Y registers allow to pre-set a sub-window in the touchscreen such that any touch position that is outside the sub-window is discarded. Figure 10. Window tracking Top right coordinates Active window Bottom left coordinates FIFO FIFO has a depth of 128 sectors. This is enough for 128 sets of touch data at maximum resolution (2 x 12 bits). FIFO can be programmed to generate an interrupt when it is filled to a pre-determined level.
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STMPE811 Touchscreen controller Sampling time calculation The equation for a complete sampling cycle is described below. Touch Detect Delay Sampling Z Settling Time Sampling Y Settling Time Sampling X Settling Time Touch Detect Delay Figure 12.
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Touchscreen controller Table 15.
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STMPE811 Touchscreen controller TSC_CTRL 7 touchscreen controller control register 6 5 TSC_STA 4 3 2 TRACK 1 OP_MOD Address: 0x40 Type: R/W Reset: 0x90 Description: 4-wire touchscreen controller (TSC) setup.
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Touchscreen controller STMPE811 [5:3] TOUCH_DET_DELAY_2/1/0: Touch detect delay 000 - 10 μs 001 - 50 μs 010 = 100 μs 011 = 500 μs 100 = 1 ms 101 = 5 ms 110 = 10 ms 111 = 50 ms [2:0] SETTLING: Panel driver settling time(1) 000 = 10 μs 001 = 100 μs 010 = 500 μS 011 =1 ms 100 = 5 ms 101 = 10 ms 110 = 50 ms 111 =100 ms 1. For large panels (> 6”), a capacitor of 10 nF is recommended at the touchscreen terminals for noise filtering. In this case, settling time of 1 ms or more is recommended.
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STMPE811 10.2 Touchscreen controller Touch detect delay Touch Detect Delay is an additional method used to compensate for the time it takes for the panel voltage to be pulled high during a non-touch condition. For example, the way it works to detect a touch: X+ is pulled high and Y+ is driven low. After Touch Detect Delay is expired the level of X+ is read. If no touch, X+ is high. If there is a touch, X+ is low.
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Touchscreen controller STMPE811 WDW_TR_X Window setup for top right X 7 6 5 4 3 2 1 0 TR_X [11:0] Address: 0x42 Type: R/W Reset: 0x0FFF Description: Window setup for top right X coordinates. [11:0] TR_X: Bit 11:0 of top right X coordinates WDW_TR_Y Window setup for top right Y 7 6 5 4 3 2 1 0 TR_Y [11:0] Address: 0x44 Type: R/W Reset: 0x0FFF Description: Window setup for top right Y coordinates.
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STMPE811 Touchscreen controller FIFO_TH FIFO threshold 7 6 5 4 3 2 1 0 FIFO_TH Address: 0x4A Type: R/W Reset: 0x00 Description: Triggers an interrupt upon reaching or exceeding the threshold value. This field must not be set as zero. [7:0] FIFO_TH: touchscreen controller FIFO threshold FIFO_STA FIFO status 7 6 5 4 FIFO_OFLOW FIFO_FULL FIFO_EMPTY FIFO_TH_TRIG Address: 0x4B Type: R/W Reset: 0x20 Description: 3 2 RESERVED 1 0 FIFO_RESET Current status of FIFO..
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Touchscreen controller STMPE811 FIFO_SIZE FIFO size 7 6 5 4 3 RESERVED 2 1 0 FIFO_SIZE Address: 0x4C Type: R Reset: 0x00 Description: Current number of samples available. [7:0] FIFO_SIZE: Number of samples available TSC_DATA_X 11 10 TSC_DATA_X 9 8 7 6 5 4 3 2 1 0 DATAY[11:0] Address: 0x4D Type: R Reset: 0x0000 Description: Bit 11:0 of X data.
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STMPE811 Touchscreen controller TSC_DATA_XYZ 7 Touchscreen controller DATA 6 5 4 3 2 1 0 DATA Address: 0x57 (auto-increment), 0xD7 (non-auto-increment) Type: R Reset: 0x00 Description: Data port for TSC data access [11:0] DATA: data bytes from TSC FIFO The data format from the TSC_DATA register depends on the setting of "OpMode" field in TSC_CTRL register. The samples acquired are accessed in "packed samples".
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Touchscreen controller STMPE811 TSC_FRACTION_Z 7 6 Touchscreen controller FRACTION_Z 5 4 3 2 RESERVED 1 0 FRACTION_Z Address: 0x56 Type: R Reset: 0x00 Description: This register allows to select the range and accuracy of the pressure measurement [7:3] RESERVED [2:0] FRACTION_Z: 000: Fractional part is 0, whole part is 8 001: Fractional part is 1, whole part is 7 010: Fractional part is 2, whole part is 6 011: Fractional part is 3, whole part is 5 100: Fractional part is 4, whole part is 4
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STMPE811 Touchscreen controller [3:0] SHIELD[3:0]: Write 1 to GND X+, X-, Y+, Y- lines Doc ID 14489 Rev 6 45/65
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Touchscreen controller programming sequence 11 STMPE811 Touchscreen controller programming sequence The following are the steps to configure the touchscreen controller (TSC): a) Disable the clock gating for the touchscreen controller and ADC in the SYS_CFG2 register. b) Configure the touchscreen operating mode and the window tracking index. c) A touch detection status may also be enabled through enabling the corresponding interrupt flag.
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STMPE811 Touchscreen controller programming sequence Z value. With the Z value obtained from the register, the user simply needs to multiply the Z value with the touchscreen panel resistance to obtain the touch resistance. o) The TSC_DATA register allows facilitation of another reading format with minimum I2C transaction overhead by using the non autoincrement mode (or equivalent mode in SPI).
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Temperature sensor 12 STMPE811 Temperature sensor The STMPE811 internal temperature sensor can be used as a reference for compensation of the touchscreen parameters. Temperature measurement is optimised for temperature from 0 ° C to 85 ° C. Table 17.
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STMPE811 Temperature sensor TEMP_CTRL 7 Temperature sensor setup 6 5 RESERVED 4 3 2 1 0 THRES_RANGE THRES_EN ACQ_MOD ACQ ENABLE Address: 0x60 Type: R/W Reset: 0x00 Description: Temperature sensor setup [7:5] RESERVED [4] THRES_RANGE: '0' assert interrupt if temperature is >= threshold '1' assert interrupt if otherwise [3] THRES_EN: temperature threshold enable [2] ACQ_MOD: '0' to acquire temperature for once only '1' to acquire temperature every 10mS [1] ACQ [0] ENABLE TEMP_DATA 11
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Temperature sensor STMPE811 TEMP_TH 11 Temperature threshold 10 9 8 7 6 5 4 TEMP_TH Address: 0x63 is MSB, 0x64 is LSB Type: R/W Reset: 0x00 Description: Threshold for temperature controlled interrupt [11:0] TEMP_TH: temperature threshold 50/65 Doc ID 14489 Rev 6 3 2 1 0
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STMPE811 13 GPIO controller GPIO controller A total of 8 GPIOs are available in the STMPE811 port expander device. Most of the GPIOs share physical pins with some alternate functions. The GPIO controller contains the registers that allow the host system to configure each of the pins into either a GPIO, or one of the alternate functions. Unused GPIOs should be configured as outputs to minimize power consumption. A group of registers are used to control the exact function of each of the 8 GPIOs.
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GPIO controller STMPE811 GPIO_CLR_PIN Clear pin state register Address: 0x11 Type: R/W Reset: 0x00 Description: GPIO clear pin state register. Writing ‘1’ to this bit causes the corresponding GPIO to go to 0 state. Writing ‘0’ has no effect. GPIO_MP_STA GPIO monitor pin state register Address: 0x12 Type: R/W Reset: 0x00 Description: GPIO monitor pin state. Reading this bit yields the current state of the bit. Writing has no effect.
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STMPE811 GPIO controller GPIO_RE Rising edge register Address: 0x15 Type: R/W Reset: 0x00 Description: GPIO rising edge detection enable register. Setting this bit to ‘1’ would enable the detection of the rising edge transition. The detection would be reflected in the GPIO edge detect status register. GPIO_FE Falling edge detection enable register Address: 0x16 Type: R/W Reset: 0x00 Description: Setting this bit to ‘1’ would enable the detection of the falling edge transition.
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Maximum rating 14 STMPE811 Maximum rating Stressing the device above the ratings listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect the device’s reliability. Table 19.
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STMPE811 Maximum rating 14.1 Recommended operating conditions Table 20. Power consumption Value Symbol Vcc Parameter Test condition Unit Min Typ Max 1.65 − 3.6 V 1.65 − 3.6 V Core supply current Touchscreen controller at 100 Hz sampling VCC= 1.8 − 3.3 V − 0.5 1.0 µA I/O supply current Touchscreen controller at 100 Hz sampling VIO = 1.8 V − 0.8 1.2 mA I/O supply current Touchscreen controller at 100 Hz sampling VIO = 3.3 V − 2.0 2.
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Electrical specifications 15 STMPE811 Electrical specifications Table 21. DC electrical characteristics (-40 ° C to 85 ° C) all GPIOs comply to JEDEC standard JESD-8-7) Value Symbol Parameter Test condition Unit Min Typ Max VIL Input voltage low state VIO = 1.8 − 3.3 V -0.3 V − 0.20 VIO V VIH Input voltage high state VIO = 1.8 − 3.3 V 0.80 VIO − VIO + 0.3 V V VOL Output voltage low state VIO = 1.8 V, IOL = 4 mA Output voltage high VIO = 3.3 V, state IOL = 8 mA -0.3 V − 0.
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STMPE811 Electrical specifications Table 23. ADC specification (-40 ° C to 85 ° C) Value Parameter Test condition Unit Min Typ Max Full-scale input span 0 − Vref V Absolute input range − − VCC +0.2 V Input capacitance − 25 − pF Leakage current − 0.
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Package mechanical data 16 STMPE811 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
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STMPE811 Package mechanical data Figure 13. Package outline for QFN16 (3 x 3 x 1 mm) - 0.50 pitch 7185330_F 1. Drawing not to scale.
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Package mechanical data Table 25. STMPE811 Package mechanical data for QFN16 (3 x 3 x 1 mm) - 0.50 pitch Millimeters Symbol Min Typ Max A 0.80 0.90 1.00 A1 − 0.02 0.05 A3 − 0.20 − b 0.18 0.25 0.30 D 2.85 3.00 3.15 D1 − 1.50 − D2 See exposed pad variation E 2.85 3.00 3.15 E1 − 1.50 − E2 See exposed pad variation e 0.45 0.50 0.55 L 0.30 0.40 0.50 ddd − − 0.05 Table 26. Exposed pad variation Millimeters Symbol 60/65 Min Typ Max D2 1.70 1.80 1.
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STMPE811 Package mechanical data Figure 14. Recommended footprint 1. Drawing not to scale. Table 27. Footprint dimensions Millimeters Symbol Min Typ Max A − 3.8 − B − 3.8 − C − 0.5 − D − 0.3 − E − 0.8 − F − 1.5 − G − 0.
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Package mechanical data STMPE811 Figure 15. Carrier tape for QFN16 (3 x 3 x 1 mm) - 0.50 pitch 7875978 1. Drawing not to scale.
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STMPE811 Package mechanical data Figure 16. Reel information for QFN16 (3 x 3 x 1 mm) - 0.50 pitch 7875978_14 1. Drawing not to scale.
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Revision history 17 STMPE811 Revision history Table 28. 64/65 Document revision history Date Revision Changes 09-Jun-2008 1 Initial release. 22-Apr-2009 2 Document status promoted from preliminary data to datasheet. Modified: title and package silhouette in the cover page. Section 6: STMPE811 registers, Section 7: System and identification registers, Section 10: Touchscreen controller and Section 13: GPIO controller: content reworked to improve readability, no technical changes.
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STMPE811 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.