Datasheet

(3)
To calculate P
Dmax
(T
A
), use the formula P
Dmax
= (T
Jmax
- T
A
)/Θ
JA
(see Thermal characteristics).
Figure 10: f
CPUmax
versus V
DD
16
12
8
4
0
2.95
4.0
5.0
5.5
f
CPU
(MHz)
Functionality guaranteed
@T
A
-40 to 125 °C
Supply voltage
Functionality
not
guaranteed
in this area
Table 22: Operating conditions at power-up/power-down
UnitMaxTypMinConditionsParameterSymbol
µs/V∞2V
DD
rise time ratet
VDD
∞2V
DD
fall time rate
(1)
ms1.7V
DD
risingReset release delayt
TEMP
V2.852.72.6Power-on reset
threshold
V
IT+
2.82.652.5Brown-out reset
threshold
V
IT-
mV70Brown-out reset
hysteresis
V
HYS(BOR)
(1)
Reset is always generated after a t
TEMP
delay. The application must ensure that V
DD
is
still above the minimum ooperating voltage (V
DD
min) when the t
TEMP
delay has elapsed.
VCAP external capacitor10.3.1
Stabilization for the main regulator is achieved connecting an external capacitor C
EXT
to the
V
CAP
pin. C
EXT
is specified in the Operating conditions section. Care should be taken to limit
the series inductance to less than 15 nH.
DocID15590 Rev 854/116
STM8S903K3 STM8S903F3Electrical characteristics