Datasheet

Figure 6: STM8S903K3 SDIP32 pinout
8
1
2
3
4
5
6
7
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
AIN4/TIM5_CH2/ADC_ETR/PD3(HS)
TIM5_CH1[UART1_CK]BEEP/PD4(HS)
AIN5/UART1_TX/PD5(HS)
AIN6/UART1_RX/PD6(HS)
[TIM1_CH4]TLI/PD7(HS)
NRST
OSCIN/PA1
OSCOUT/PA2
V
SS
VCAP
V
DD
[UART1_TX][SPI_NSS]/TIM5_CH3/PA3(HS)
[UART1_RX]/PF4
PB6
PB4(T)/I2C_SCL[ADC_ETR]
PB3(HS)[AIN3]TIM1_ETR
PB2(HS)/AIN2/TIM1_CH3N
PB1(HS)/AIN1/TIM1_CH2N
PB0(HS)/AIN0/TIM1_CH1N
PE5/SPI_NSS[TIM1_CH1N]
PC1(HS)/TIM1_CH1/UART1_CK[TIM1_CH2N]
PC2(HS)/TIM1_CH2[TIM1_CH3N]
PC3(HS)/TIM1_CH3[TLI][TIM1_CH1N]
PC4(HS)/TIM1_CH4/CLK_CCO[AIN2][TIM1_CH2N]
PC5(HS)/SPI_SCK[TIM5_CH1]
PC6(HS)/SPI_MOSI[TIM1_CH1]
PC7(HS)/SPI_MISO[TIM1_CH2]
PD0(HS)/TIM1_BKIN[CLK_CCO]
PD1(HS)/SWIM
PD2(HS)[AIN3][TIM5_CH3]
PB7
[TIM1_BKIN]I2C_SDA/PB5(T)
1. (HS) high sink capability.
2. (T) true open drain (P-buffer and protection diode to V
DD
not implemented).
3. [ ] alternate function remapping option (if the same alternate function is shown twice, it
indicates an exclusive choice not a duplication of the function).
Pin description5.5
Table 6: UFQFPN32/LQFP32/SDIP32 pin description
Alternate function after remap
[option bit]
Default alternate functionMain
function
(after
reset)
OutputInput
TypePin nameUFQFPN/
LQFP32
SDIP
32
PPODSpeedHigh
sink
(1)
Ext.
interrupt
wpufloating
ResetXI/ONRST16
Resonator/ crystal inPort
A1
XXO1XXXI/O
PA1/ OSCIN
(2)
27
Resonator/ crystal outPort
A2
XXO1XXXI/OPA2/ OSCOUT38
Digital groundSV
SS
49
1.8 V regulator capacitorSVCAP510
Digital power supplySV
DD
611
SPI master/ slave select
[AFR1]/ UART1 data transmit
[AFR1:0]
Timer 52 channel 3Port
A3
XXO3HSXXXI/OPA3/ TIM5_CH3 [SPI_NSS]
[UART1_TX]
712
UART1 data receive [AFR1:0]Port
F4
XXO1XXI/OPF4 [UART1_RX]813
Port
B7
XXO1XXXI/OPB7914
DocID15590 Rev 824/116
STM8S903K3 STM8S903F3Pinout and pin description