Datasheet

Electrical characteristics STM8S207xx, STM8S208xx
62/103 Doc ID 14733 Rev 12
Total current consumption and timing in forced reset state
Current consumption of on-chip peripherals
Subject to general operating conditions for V
DD
and T
A
.
HSI internal RC/f
CPU
= f
MASTER
= 16 MHz.
Table 29. Total current consumption and timing in forced reset state
Symbol Parameter Conditions Typ Max
(1)
Unit
I
DD(R)
Supply current in reset state
V
DD
= 5 V 1.6
mA
V
DD
= 3.3 V 0.8
t
RESETBL
Reset release to bootloader vector
fetch
150 µs
1. Data guaranteed by design, not tested in production.
Table 30. Peripheral current consumption
Symbol Parameter Typ. Unit
I
DD(TIM1)
TIM1 supply current
(1)
1. Data based on a differential I
DD
measurement between reset configuration and timer counter running at
16 MHz. No IC/OC programmed (no I/O pads toggling). Not tested in production.
220
µA
I
DD(TIM2)
TIM2 supply current
(1)
120
I
DD(TIM3)
TIM3 timer supply current
(1)
100
I
DD(TIM4)
TIM4 timer supply current
(1)
25
I
DD(UART1)
UART1 supply current
(2)
2. Data based on a differential I
DD
measurement between the on-chip peripheral when kept under reset and
not clocked and the on-chip peripheral when clocked and not kept under reset. No I/O pads toggling. Not
tested in production.
90
I
DD(UART3)
UART3 supply current
(2)
110
I
DD(SPI)
SPI supply current
(2)
40
I
DD(I
2
C)
I
2
C supply current
(2)
50
I
DD(CAN)
beCAN supply current
(2)
210
I
DD(ADC2)
ADC2 supply current when converting
(3)
3. Data based on a differential I
DD
measurement between reset configuration and continuous A/D
conversions. Not tested in production.
1000