Datasheet

Memory and register map STM8S207xx, STM8S208xx
34/103 Doc ID 14733 Rev 12
Tabl e 7 lists the boundary addresses for each memory size. The top of the stack is at the
RAM end address in each case.
6.2 Register map
Table 7. Flash, Data EEPROM and RAM boundary addresses
Memory area Size (bytes) Start address End address
Flash program memory
128 K 0x00 8000 0x02 7FFF
64 K 0x00 8000 0x01 7FFF
32 K 0x00 8000 0x00 FFFF
RAM
6 K 0x00 0000 0x00 17FF
4 K 0x00 0000 0x00 1000
2 K 0x00 0000 0x00 07FF
Data EEPROM
2048 0x00 4000 0x00 47FF
1536 0x00 4000 0x00 45FF
1024 0x00 4000 0x00 43FF
Table 8. I/O port hardware register map
Address Block Register label Register name
Reset
status
0x00 5000
Port A
PA_ODR Port A data output latch register 0x00
0x00 5001 PA_IDR Port A input pin value register 0x00
0x00 5002 PA_DDR Port A data direction register 0x00
0x00 5003 PA_CR1 Port A control register 1 0x00
0x00 5004 PA_CR2 Port A control register 2 0x00
0x00 5005
Port B
PB_ODR Port B data output latch register 0x00
0x00 5006 PB_IDR Port B input pin value register 0x00
0x00 5007 PB_DDR Port B data direction register 0x00
0x00 5008 PB_CR1 Port B control register 1 0x00
0x00 5009 PB_CR2 Port B control register 2 0x00
0x00 500A
Port C
PC_ODR Port C data output latch register 0x00
0x00 500B PB_IDR Port C input pin value register 0x00
0x00 500C PC_DDR Port C data direction register 0x00
0x00 500D PC_CR1 Port C control register 1 0x00
0x00 500E PC_CR2 Port C control register 2 0x00