Datasheet

10-bit ADC characteristics10.3.11
Subject to general operating conditions for V
DDA
, f
MASTER
, and T
A
unless otherwise specified.
Table 45: ADC characteristics
UnitMaxTypMinConditionsParameterSymbol
MHz4.01.0V
DDA
=2.95 to 5.5 VADC clock frequencyf
ADC
6.01.0V
DDA
=4.5 to 5.5 V
V5.53.0Analog supplyV
DDA
VV
DDA
2.75
(1)
Positive reference voltageV
REF+
V0.5
(1)
V SSA
Negative reference voltageV
REF-
V
V DDAV SSA
Conversion voltage range
(2)
V
AIN
VV
REF+
V
REF-
Devices with
external
V
REF+
/V
REF-
pins
pF3.0Internal sample and hold
capacitor
C
ADC
µs0.75f
ADC
= 4 MHzSampling timet
S
(2)
0.5f
ADC
= 6 MHz
µs7.0Wakeup time from standbyt
STAB
µs3.5f
ADC
= 4 MHzTotal conversion time
(including sampling time,
10-bit resolution)
t
CONV
µs2.33f
ADC
= 6 MHz
1/f
ADC
14
(1)
Data guaranteed by design, not tested in production..
(2)
During the sample time the input capacitance C
AIN
(3 pF max) can be charged/discharged
by the external source. The internal resistance of the analog source must allow the
capacitance to reach its final voltage level within t
S.
After the end of the sample time t
S
,
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STM8S105xxElectrical characteristics