Datasheet

Option bytes8
Option bytes contain configurations for device hardware features as well as the memory
protection of the device. They are stored in a dedicated block of the memory. Except for the
ROP (read-out protection) byte, each option byte has to be stored twice, in a regular form
(OPTx) and a complemented one (NOPTx) for redundancy.
Option bytes can be modified in ICP mode (via SWIM) by accessing the EEPROM address
shown in the table below.
Option bytes can also be modified ‘on the fly’ by the application in IAP mode, except the ROP
option that can only be modified in ICP mode (via SWIM).
Refer to the STM8S Flash programming manual (PM0051) and STM8 SWIM communication
protocol and debug module user manual (UM0470) for information on SWIM programming
procedures.
Table 12: Option bytes
Factory
default
setting
Option bitsOption
byte no.
Option
name
Addr.
01234567
00hROP [7:0]OPT0Read-out
protection
(ROP)
0x4800
00hUBC [7:0]OPT1User boot
code(UBC)
0x4801
FFhNUBC [7:0]NOPT10x4802
00hAFR0AFR1AFR2AFR3AFR4AFR5
AFR6AFR7OPT2Alternate
function
0x4803
FFhNAFR0NAFR1NAFR2NAFR3NAFR4NAFR5NAFR6NAFR7NOPT20x4804
remapping
(AFR)
00hWWDG
_HALT
WWDG
_HW
IWDG
_HW
LSI_ ENHSI
TRIM
ReservedOPT3Miscell.
option
0x4805h
FFhNWW
G_HALT
NWWDG
_HW
NIWDG
_HW
NLSI_
EN
NHSI
TRIM
ReservedNOPT30x4806
00hPRS C0PRS C1CKAWU
SEL
EXT CLKReservedOPT4Clock
option
0x4807
FFhNPR
SC0
NPRSC1NCKA
WUSEL
NEXT
CLK
ReservedNOPT40x4808
00hHSECNT [7:0]OPT5HSE clock
startup
0x4809
FFhNHSECNT [7:0]NOPT50x480A
00hReserved
OPT6
Reserved0x480B
49/124DocID14771 Rev 12
Option bytesSTM8S105xx