Datasheet

Interrupt vector mapping7
Table 11: Interrupt mapping
Vector
address
Wakeup from
active-halt
mode
Wakeup
from halt
mode
DescriptionSource
block
IRQ
no.
0x00 8000YesYesResetRESET
0x00 8004--Software interruptTRAP
0x00 8008--External top level interruptTLI0
0x00 800CYes-Auto wake up from haltAWU1
0x00 8010--Clock controllerCLK2
0x00 8014Yes
(1)
Yes
(1)
Port A external interruptsEXTI03
0x00 8018YesYesPort B external interruptsEXTI14
0x00 801CYesYesPort C external interruptsEXTI25
0x00 8020YesYesPort D external interruptsEXTI36
0x00 8024YesYesPort E external interruptsEXTI47
0x00 80288
0x00 802C--Reserved9
0x00 8030YesYesEnd of transferSPI10
0x00 8034--TIM1 update/ overflow/
underflow/ trigger/ break
TIM111
0x00 8038--TIM1 capture/ compareTIM112
0x00 803C--TIM update/ overflowTIM213
0x00 8040--TIM capture/ compareTIM214
47/124DocID14771 Rev 12
Interrupt vector mappingSTM8S105xx