Datasheet

Reset statusRegister nameRegister labelBlockAddress
Reserved area (17 bytes)0x00 50A2 to
0x00 50B2
0xXX
(1)
Reset status registerRST_SRRST0x00 50B3
Reserved area (12 bytes)0x00 50B4 to
0x00 50BF
0x01Internal clock control registerCLK_ICKRCLK0x00 50C0
0x00External clock control registerCLK_ECKR0x00 50C1
Reserved area (1 byte)0x00 50C2
0xE1Clock master status registerCLK_CMSRCLK0x00 50C3
0xE1Clock master switch registerCLK_SWR0x00 50C4
0xXXClock switch control registerCLK_SWCR0x00 50C5
0x18Clock divider registerCLK_CKDIVR0x00 50C6
0xFFPeripheral clock gating register
1
CLK_PCKENR10x00 50C7
0x00Clock security system registerCLK_CSSR0x00 50C8
0x00Configurable clock control
register
CLK_CCOR0x00 50C9
0xFFPeripheral clock gating register
2
CLK_PCKENR20x00 50CA
0x00CAN clock control registerCLK_CANCCR0x00 50CB
0x00HSI clock calibration trimming
register
CLK_HSITRIMR0x00 50CC
0bXXXX
XXX0
SWIM clock control registerCLK_SWIMCCR0x00 50CD
DocID14771 Rev 1234/124
STM8S105xxMemory and register map