Datasheet

Figure 5: LQFP/UFQFPN 32-pin pinout
[TIM1_ETR] AIN3/PB3
[TIM1_CH3N] AIN2/PB2 [TIM1_CH2N] AIN1/PB1 [TIM1_CH1N] AIN0/PB0
VDDA
VSSA
32 31 30 29 28 27 26 25
24
23
22
21
20
19
18
17
9 10 11 12 13 14 15
16
1
2
3
4
5
6
7
8
VCAP
VDD
VDDIO
AIN12/PF4
NRST
OSCIN/PA1
OSCOUT/PA2
VSS
PC3 (HS)/TIM1_CH3
PC2 (HS)/TIM1_CH2
PC1 (HS)/TIM1_CH1/UART2_CK
PE5/SPI_NSS
PC7 (HS)/SPI_MISO
PC6 (HS)/SPI_MOSI
PC5 (HS)/SPI_SCK
PC4 (HS)/TIM1_CH4
PD3 (HS)/TIM2_CH2 [ADC_ETR] PD2 (HS)/TIM3_CH1 [TIM2_CH3] PD1 (HS)/SWIM PD0 (HS)/TIM3_CH2 [TIM1_BKIN] [CLK_CCO] PD7/TLI [TIM1_CH4] PD6/UART2_RX PD5/UART2_TX PD4 (HS)/TIM2_CH1 [BEEP]
[I2C_SDA] AIN5/PB5
[I2C_SCL] AIN4/PB4
1. (HS) high sink capability.
2. [ ] alternate function remapping option (If the same alternate function is shown twice, it
indicates an exclusive choice not a duplication of the function).
23/124DocID14771 Rev 12
Pinout and pin descriptionSTM8S105xx