Datasheet

ChangesRevisionDate
Added Unique ID
Operating conditions: added introductory text; removed low
power dissipation condition for T
A
, replaced "C
EXT
" by "VCAP",
and added ESR and ESL data in table "general operating
conditions".
Total current consumption in halt mode: replaced max value
of I
DD(H)
at 85 °C from 20 µA to 25 µA for the condition "Flash
in powerdown mode, HSI clock after wakeup in the table "total
current consumption in halt mode at V
DD
= 5 V.
Low power mode wakeup times: added first condition (0 to 16
MHz) for the t
WU(WFI)
parameter in the table "wakeup times".
Internal clock sources and timing characteristics: In the table
"HSI oscillator characteristics", replaced min and max values
of "ACC
HSI
factory calibrated parameter" and removed footnote
4 concerning further characterization of results.
Functional EMS (electromagnetic susceptibility): IEC 1000
replaced with IEC 61000.
Designing hardened software to avoid noise problems: IEC
1000 replaced with IEC 61000.
Electromagnetic interference (EMI): SAE J 1752/3 replaced
with IEC61967-2.
Thermal characteristics: Replaced the thermal resistance
junction ambient temperature of LQFP32 7X7 mm from 59 °C
to 60 °C in the thermal characteristics table.
Added 32-lead UFQFPN package mechanical data.
Added STM8S105 FASTROM microcontroller option list.
Table 5: Legend/abbreviations for pinout tables : updated "reset
state"; removed "HS", (T), and "[ ]".
1021-Sep-2010
Table 6: Pin description for STM8S105 microcontrollers: added
footnotes to the PF4 and PD1 pins.
Table 8: I/O port hardware register map: changed reset status
of Px_IDR from 0x00 to 0xXX.
Table 9: General hardware register map: Standardized all
address and reset state values; updated the reset state values
of the RST_SR, CLK_SWCR, CLK_HSITRIMR,
CLK_SWIMCCR, IWDG_KR, UART2_DR, and ADC_DRx
registers; replaced reserved address "0x00 5248" with the
UART2_CR5.
Figure 40: Recommended reset pin protection: replaced 0.01
µF with 0.1 µF
DocID14771 Rev 12122/124
STM8S105xxRevision history