Datasheet

ChangesRevisionDate
Updated Figure 44: Typical application with I2C bus and timing
diagram (1) .
Updated footnote 1 in Table 46: ADC accuracy with RAIN <
10 kΩ , VDDA= 5 V and Table 47: ADC accuracy with RAIN
< 10 kΩ RAIN, VDDA = 3.3 V .
STM8S105 FASTROM microcontroller option list: removed bits
6 and 7 from OPT1 user boot code area (UBC); added "disable"
to 00h and "enable" to 55h of OPTBL bootloader option byte.
Figure 50: 32-lead, ultra thin, fine pitch quad flat no-lead
package (5 x 5): replaced note 1 and added note 2.
Removed VFQFPN32 package.
1104-Apr-2012
Modified Description.
Remove weak pull-up input for PE1 and PE2 in Table 6: Pin
description for STM8S105 microcontrollers
Updated Table 11: Interrupt mapping for TIM2 and TIM4.
Updated notes related to V
CAP
in Table 19: General operating
conditions.
Added values of t
R
/t
F
for 50 pF load capacitance, and updated
note in Table 38: I/O static characteristics.
Updated typical and maximum values of R
PU
in Table 38: I/O
static characteristics and Table 42: NRST pin characteristics.
Changed SCK input to SCK output in SPI serial peripheral
interface
Added Θ
JA
for UFQFPN32 and SDIP32 in Table 57: Thermal
characteristics(1) , and updated Selecting the product
temperature range
Added UFQFPN package thickness in Figure 52: STM8S105xx
access line ordering information scheme.
1228-Jun-2012
123/124DocID14771 Rev 12
Revision historySTM8S105xx