Datasheet

Register map6.2
I/O port hardware register map6.2.1
Table 7: I/O port hardware register map
Reset
status
Register nameRegister labelBlockAddress
0x00Port A data output latch registerPA_ODR
Port A
0x00 5000
0xXX
(1)
Port A input pin value registerPA_IDR0x00 5001
0x00Port A data direction registerPA_DDR0x00 5002
0x00Port A control register 1PA_CR10x00 5003
0x00Port A control register 2PA_CR20x00 5004
0x00Port B data output latch registerPB_ODR
Port B
0x00 5005
0xXX
(1)
Port B input pin value registerPB_IDR0x00 5006
0x00Port B data direction registerPB_DDR0x00 5007
0x00Port B control register 1PB_CR10x00 5008
0x00Port B control register 2PB_CR20x00 5009
0x00Port C data output latch registerPC_ODR
Port C
0x00 500A
0xXX
(1)
Port C input pin value registerPB_IDR0x00 500B
0x00Port C data direction registerPC_DDR0x00 500C
0x00Port C control register 1PC_CR10x00 500D
0x00Port C control register 2PC_CR20x00 500E
0x00Port D data output latch registerPD_ODR
Port D
0x00 500F
0xXX
(1)
Port D input pin value registerPD_IDR0x00 5010
0x00Port D data direction registerPD_DDR0x00 5011
0x02Port D control register 1PD_CR10x00 5012
0x00Port D control register 2PD_CR20x00 5013
0x00Port E data output latch registerPE_ODR
Port E
0x00 5014
0xXX
(1)
Port E input pin value registerPE_IDR0x00 5015
0x00Port E data direction registerPE_DDR0x00 5016
0x00Port E control register 1PE_CR10x00 5017
29/117DocID15441 Rev 9
Memory and register mapSTM8S103K3 STM8S103F3 STM8S103F2