Datasheet

Alternate
function after
remap [option
bit]
Default alternate
function
Main
function
(after
reset)
OutputInput
Type
Pin
name
LQFP/
UFQFP
32
SDIP
32
PPODSpeed
High
sink
(1)
Ext.
interrupt
wpufloating
SPI master in/ slave
out
Port C7XXO3HSXXXI/OPC7/
SPI_MISO
2429
Configurable
clock output
[AFR5]
Timer 1 - break inputPort D0XXO3HSXXXI/OPD0/
TIM1_BKIN
[CLK_CCO]
2530
SWIM data interfacePort D1XXO4HSXXXI/OPD1/
SWIM
2631
(4)
Timer 2 -
channel
3[AFR1]
Port D2XXO3HSXXXI/OPD2
[TIM2_CH3]
2732
Timer 2 - channel
2/ADC external
trigger
Port D3XXO3HSXXXI/OPD3/
TIM2_CH2/
ADC_ETR
281
Timer 2 - channel
1/BEEP output
Port D4XXO3HSXXXI/OPD4/BEEP/
TIM2_CH1
292
UART1 data transmitPort D5XXO3HSXXXI/OPD5/
UART1_TX
303
UART1 data receivePort D6XXO3HSXXXI/OPD6/
UART1_RX
314
Timer 1 -
channel 4
[AFR6]
Top level interruptPort D7XXO3HSXXXI/OPD7/ TLI
[TIM1_CH4]
325
(1)
I/O pins used simultaneously for high current source/sink must be uniformly spaced around the package. In addition, the total
driven current must respect the absolute maximum ratings (see Electrical characteristics).
(2)
When the MCU is in Halt/Active-halt mode, PA1 is automatically configured in input weak pull-up and cannot be used for waking
up the device. In this mode, the output state of PA1 is not driven. It is recommended to use PA1 only in input mode if Halt/Active-halt
is used in the application.
(3)
In the open-drain output column, "T" defines a true open-drain I/O (P-buffer, weak pull-up, and protection diode to V
DD
are not
implemented).
(4)
The PD1 pin is in input pull-up during the reset phase and after internal reset release.
23/117DocID15441 Rev 9
Pinout and pin descriptionSTM8S103K3 STM8S103F3 STM8S103F2