Datasheet

Prequalification trials
Most of the common failures (unexpected reset and program counter corruption) can be
recovered by applying a low state on the NRST pin or the oscillator pins for 1 second.
To complete these trials, ESD stress can be applied directly on the device, over the range of
specification values. When unexpected behavior is detected, the software can be hardened
to prevent unrecoverable errors occurring. See application note AN1015 (Software techniques
for improving microcontroller EMC performance).
Table 48: EMS data
Level/
class
ConditionsParameterSymbol
2/B
(1)
V
DD
= 3.3 V, T
A
= 25 °C, f
MASTER
= 16 MHz
(HSI clock), conforming to IEC 61000-4-2
Voltage limits to be
applied on any I/O pin to
induce a functional
disturbance
V
FESD
4/A
(1)
V
DD
= 3.3 V, T
A
= 25 °C ,f
MASTER
= 16 MHz
(HSI clock),conforming to IEC 61000-4-4
Fast transient voltage
burst limits to be applied
through 100 pF on V
DD
V
EFTB
and V
SS
pins to induce a
functional disturbance
(1)
Data obtained with HSI clock configuration, after applying HW recommendations described
in AN2860 (EMC guidelines for STM8S microcontrollers).
Electromagnetic interference (EMI)10.3.11.3
Based on a simple application running on the product (toggling 2 LEDs through the I/O ports),
the product is monitored in terms of emission. This emission test is in line with the norm SAE
IEC 61967-2 which specifies the board and the loading of each pin.
Table 49: EMI data
Unit
Conditions
ParameterSymbol
Max f
HSE
/f
CPU
(1)
Monitored
frequency band
General
conditions
16 MHz/
16 MHz
16 MHz/
8 MHz
dBμV
55
0.1 MHz to
V
DD
= 5 V
T
A
= 25 °C
Peak level
S
EMI
30 MHz
LQFP32
package
54
30 MHz to
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Electrical characteristicsSTM8S103K3 STM8S103F3 STM8S103F2