Datasheet

(1)
Care should be taken when selecting the capacitor, due to its tolerance, as well as the parameter
dependency on temperature, DC bias and frequency in addition to other factors. The parameter maximum
value must be respected for the full application range.
(2)
This frequency of 1 MHz as a condition for VCAP parameters is given by design of internal regulator.
(3)
To calculate P
Dmax
(T
A
), use the formula P
Dmax
=(T
Jmax
- T
A
)/Θ
JA
(see Thermal characteristics ) with the
value for T
Jmax
given in the previous table and the value for Θ
JA
given in Thermal characteristics.
Figure 10: f
CPUmax
versus V
DD
16
12
8
4
0
2.95
4.0
5.0
5.5
f
CPU
(MHz)
Functionality guaranteed
@T
A
-40 to 125 °C
Supply voltage
Functionality
not
guaranteed
in this area
Table 20: Operating conditions at power-up/power-down
UnitMaxTypMinConditionsParameterSymbol
μs/V
∞-2V
DD
rise time rate
t
VDD
∞-2V
DD
fall time rate
(1)
ms1.7-- -V
DD
risingReset release delayt
TEMP
V
2.852.72.6Power-on reset thresholdV
IT+
2.82.652.5Brown-out reset thresholdV
IT-
mV-70-Brown-out reset hysteresisV
HYS(BOR)
(1)
Reset is always generated after a t
TEMP
delay. The application must ensure that V
DD
is still above the
minimum ooperating voltage (V
DD
min) when the t
TEMP
delay has elapsed.
VCAP external capacitor10.3.1
Stabilization for the main regulator is achieved connecting an external capacitor C
EXT
to the
V
CAP
pin. C
EXT
is specified in the Operating conditions section. Care should be taken to limit
the series inductance to less than 15 nH.
DocID15441 Rev 954/117
STM8S103K3 STM8S103F3 STM8S103F2Electrical characteristics