Datasheet

Pin description STM8L15xx8, STM8L15xR6
38/134 DocID17943 Rev 6
Note: Slope control of all GPIO pins can be programmed except true open drain pins and by
default is limited to 2 MHz.
System configuration options
As shown in Table 5: High density and medium+ density STM8L15x pin description, some
alternate functions can be remapped on different I/O ports by programming one of the two
remapping registers described in the “Routing interface (RI) and system configuration
controller” section in the STM8L05xx, STM8L15xx and STM8L16xx reference manual
(RM0031).
5. In the 5 V tolerant I/Os, the protection diode to V
DD
is not implemented.
6. In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer, weak pull-up and protection diode to V
DD
are
not implemented).
7. Available on STM8L152xx devices only. On STM8L151xx devices it is reserved and must be tied to V
DD
.
8. The PA0 pin is in input pull-up during the reset phase and after reset release.
9. High Sink LED driver capability available on PA0.