Datasheet

Electrical parameters STM8L151xx, STM8L152xx
96/131 DocID15962 Rev 13
I
2
C - Inter IC control interface
Subject to general operating conditions for V
DD
, f
SYSCLK
, and T
A
unless otherwise specified.
The STM8L I
2
C interface (I2C1) meets the requirements of the Standard I
2
C communication
protocol described in the following table with the restriction mentioned below:
Refer to I/O port characteristics for more details on the input/output alternate function
characteristics (SDA and SCL).
Note: For speeds around 200 kHz, the achieved speed can have a5% tolerance
For other speed ranges, the achieved speed can have a 2% tolerance
The above variations depend on the accuracy of the external components used.
Table 44. I2C characteristics
Symbol Parameter
Standard mode
I
2
C
Fast mode I
2
C
(1)
1. f
SYSCLK
must be at least equal to 8 MHz to achieve max fast I
2
C speed (400 kHz).
Unit
Min
(2)
2.
Data based on standard I
2
C protocol requirement, not tested in production.
Max
(2)
Min
(2)
Max
(2)
t
w(SCLL)
SCL clock low time 4.7 - 1.3 -
s
t
w(SCLH)
SCL clock high time 4.0 - 0.6 -
t
su(SDA)
SDA setup time 250 - 100 -
ns
t
h(SDA)
SDA data hold time 0 - 0 900
t
r(SDA)
t
r(SCL)
SDA and SCL rise time - 1000 - 300
t
f(SDA)
t
f(SCL)
SDA and SCL fall time - 300 - 300
t
h(STA)
START condition hold time 4.0 - 0.6 -
s
t
su(STA)
Repeated START condition setup
time
4.7 - 0.6 -
t
su(STO)
STOP condition setup time 4.0 - 0.6 - s
t
w(STO:STA)
STOP to START condition time (bus
free)
4.7 - 1.3 - s
C
b
Capacitive load for each bus line 400 - 400 pF