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Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 64 8-Bit 16 MHz I/O number 54
41424344454647484950
Memory and register map STM8L151xx, STM8L152xx
48/131 DocID15962 Rev 13
0x00 52B0
TIM1
TIM1_CR1 TIM1 control register 1 0x00
0x00 52B1 TIM1_CR2 TIM1 control register 2 0x00
0x00 52B2 TIM1_SMCR TIM1 Slave mode control register 0x00
0x00 52B3 TIM1_ETR TIM1 external trigger register 0x00
0x00 52B4 TIM1_DER TIM1 DMA1 request enable register 0x00
0x00 52B5 TIM1_IER TIM1 Interrupt enable register 0x00
0x00 52B6 TIM1_SR1 TIM1 status register 1 0x00
0x00 52B7 TIM1_SR2 TIM1 status register 2 0x00
0x00 52B8 TIM1_EGR TIM1 event generation register 0x00
0x00 52B9 TIM1_CCMR1 TIM1 Capture/Compare mode register 1 0x00
0x00 52BA TIM1_CCMR2 TIM1 Capture/Compare mode register 2 0x00
0x00 52BB TIM1_CCMR3 TIM1 Capture/Compare mode register 3 0x00
0x00 52BC TIM1_CCMR4 TIM1 Capture/Compare mode register 4 0x00
0x00 52BD TIM1_CCER1 TIM1 Capture/Compare enable register 1 0x00
0x00 52BE TIM1_CCER2 TIM1 Capture/Compare enable register 2 0x00
0x00 52BF TIM1_CNTRH TIM1 counter high 0x00
0x00 52C0 TIM1_CNTRL TIM1 counter low 0x00
0x00 52C1 TIM1_PSCRH TIM1 prescaler register high 0x00
0x00 52C2 TIM1_PSCRL TIM1 prescaler register low 0x00
0x00 52C3 TIM1_ARRH TIM1 Auto-reload register high 0xFF
0x00 52C4 TIM1_ARRL TIM1 Auto-reload register low 0xFF
0x00 52C5 TIM1_RCR TIM1 Repetition counter register 0x00
0x00 52C6 TIM1_CCR1H TIM1 Capture/Compare register 1 high 0x00
0x00 52C7 TIM1_CCR1L TIM1 Capture/Compare register 1 low 0x00
0x00 52C8 TIM1_CCR2H TIM1 Capture/Compare register 2 high 0x00
0x00 52C9 TIM1_CCR2L TIM1 Capture/Compare register 2 low 0x00
0x00 52CA TIM1_CCR3H TIM1 Capture/Compare register 3 high 0x00
0x00 52CB TIM1_CCR3L TIM1 Capture/Compare register 3 low 0x00
0x00 52CC TIM1_CCR4H TIM1 Capture/Compare register 4 high 0x00
0x00 52CD TIM1_CCR4L TIM1 Capture/Compare register 4 low 0x00
0x00 52CE TIM1_BKR TIM1 break register 0x00
0x00 52CF TIM1_DTR TIM1 dead-time register 0x00
0x00 52D0 TIM1_OISR TIM1 output idle state register 0x00
0x00 52D1 TIM1_DCR1 DMA1 control register 1 0x00
Table 9. General hardware register map (continued)
Address Block Register label Register name
Reset
status