Datasheet

Memory and register map STM8L151xx, STM8L152xx
40/131 DocID15962 Rev 13
0x00 5084
DMA1
Reserved area (1 byte)
0x00 5085 DMA1_C1M0ARH
DMA1 memory 0 address high register
(channel 1)
0x00
0x00 5086 DMA1_C1M0ARL
DMA1 memory 0 address low register
(channel 1)
0x00
0x00 5087
0x00 5088
Reserved area (2 bytes)
0x00 5089 DMA1_C2CR DMA1 channel 2 configuration register 0x00
0x00 508A DMA1_C2SPR DMA1 channel 2 status & priority register 0x00
0x00 508B DMA1_C2NDTR
DMA1 number of data to transfer register
(channel 2)
0x00
0x00 508C DMA1_C2PARH
DMA1 peripheral address high register
(channel 2)
0x52
0x00 508D DMA1_C2PARL
DMA1 peripheral address low register
(channel 2)
0x00
0x00 508E Reserved area (1 byte)
0x00 508F DMA1_C2M0ARH
DMA1 memory 0 address high register
(channel 2)
0x00
0x00 5090 DMA1_C2M0ARL
DMA1 memory 0 address low register
(channel 2)
0x00
0x00 5091
0x00 5092
Reserved area (2 bytes)
0x00 5093 DMA1_C3CR DMA1 channel 3 configuration register 0x00
0x00 5094 DMA1_C3SPR DMA1 channel 3 status & priority register 0x00
0x00 5095 DMA1_C3NDTR
DMA1 number of data to transfer register
(channel 3)
0x00
0x00 5096
DMA1_C3PARH_
C3M1ARH
DMA1 peripheral address high register
(channel 3)
0x40
0x00 5097
DMA1_C3PARL_
C3M1ARL
DMA1 peripheral address low register
(channel 3)
0x00
0x00 5098 Reserved area (1 byte)
0x00 5099 DMA1_C3M0ARH
DMA1 memory 0 address high register
(channel 3)
0x00
0x00 509A DMA1_C3M0ARL
DMA1 memory 0 address low register
(channel 3)
0x00
0x00 509B to
0x00 509D
Reserved area (3 bytes)
0x00 509E
SYSCFG
SYSCFG_RMPCR1 Remapping register 1 0x00
0x00 509F SYSCFG_RMPCR2 Remapping register 2 0x00
Table 9. General hardware register map (continued)
Address Block Register label Register name
Reset
status