Datasheet

Revision history STM8L151xx, STM8L152xx
128/131 DocID15962 Rev 13
23-Jul-2010 5
Modified Introduction and Description
Modified Table 4: Legend/abbreviation for table 5 on page 29 and
Table 7: Medium density STM8L15x pin description on page 37 (for
PA0, PA1, PB0 and PB4 and for reset states in the floating input
column)
Modified Figure 1: Low density STM8L151xx device block diagram
on page 14, Figure 2: Low density STM8L15x clock tree diagram on
page 19, Figure 3.1: Low power modes on page 15 and Figure 3.5:
Low power real-time clock on page 19.
Modified CLK_PCKENR2 and CLK_HSICALR reset values in
Table 13: General hardware register map on page 51
Modified notes below Figure 8: Memory map on page 31
Modified PA_CR1 reset value in Table 7 on page 32
Modified reset values for Px_IDR registers in Table 7 on page 32
Modified Table 14: Voltage characteristics on page 54, Table 15:
Current characteristics on page 55
Modified V
IH
in Table 37: I/O static characteristics on page 77
Modified Table 20: Total current consumption in Wait mode on
page 61
Modified Figure 36: Typical application with I2C bus and timing
diagram 1) on page 89
Modified I
L
value in Figure 38: Typical connection diagram using the
ADC1 on page 96
Modified R
H
and R
L
in Table 45: LCD characteristics on page 103
Added graphs in Section 9: Electrical parameters on page 53
Modified note 3 below Table 44: Reference voltage characteristics
on page 89
Modified note 1 below Table 45: TS characteristics on page 91
Changed V
ESD(CDM)
value in Table 55 on page 100
Updated notes for UFQFPN32 and UFQFPN48 packages.
11-Mar-2011 6
Modified note on true open drain I/Os and I/O level columns in
Table 7: Medium density STM8L15x pin description on page 37.
Remapping option removed for USART1_TX, USART1_RX, and
USART1_CK on PC2, PC3 and PC4 in Table 7: Medium density
STM8L15x pin description on page 37.
Modified IDWDG_KR reset value in Table 13: General hardware
register map on page 51.
Replaced VREF_OUT with VREFINT and TIMx_TRIG with
TIMx_ETR.
Added Table 10: Factory conversion registers on page 49. Modified
reset values for TIM1_DCR1, IWDG_KR, RTC_DR1, RTC_DR2,
RTC_SPRERH, RTC_SPRERL, RTC_APRER, RTC_WUTRH, and
RTC_WUTRL in Table 13: General hardware register map on
page 51.
Added notes to certain values in Section 9.3.9: Embedded reference
voltage on page 89 and Section 9.3.10: Temperature sensor on
page 91.
Table 69. Document revision history
Date Revision Changes