Datasheet

Functional overview STM8L151xx, STM8L152xx
14/131 DocID15962 Rev 13
3.1 Low power modes
The medium density STM8L15x devices support five low power modes to achieve the best
compromise between low power consumption, short startup time and available wakeup
sources:
 Wait mode: The CPU clock is stopped, but selected peripherals keep running. An
internal or external interrupt, event or a Reset can be used to exit the microcontroller
from Wait mode (WFE or WFI mode). Wait consumption: refer to Table 21.
 Low power run mode: The CPU and the selected peripherals are running. Execution
is done from RAM with a low speed oscillator (LSI or LSE). Flash and data EEPROM
are stopped and the voltage regulator is configured in ultra-low-power mode. The
microcontroller enters Low power run mode by software and can exit from this mode by
software or by a reset.
All interrupts must be masked. They cannot be used to exit the microcontroller from this
mode. Low power run mode consumption: refer to Table 22.
 Low power wait mode: This mode is entered when executing a Wait for event in Low
power run mode. It is similar to Low power run mode except that the CPU clock is
stopped. The wakeup from this mode is triggered by a Reset or by an internal or
external event (peripheral event generated by the timers, serial interfaces, DMA
controller (DMA1), comparators and I/O ports). When the wakeup is triggered by an
event, the system goes back to Low power run mode.
All interrupts must be masked. They cannot be used to exit the microcontroller from this
mode. Low power wait mode consumption: refer to Table 23 .
 Active-halt mode: CPU and peripheral clocks are stopped, except RTC. The wakeup
can be triggered by RTC interrupts, external interrupts or reset. Active-halt
consumption: refer to Table 24 and Table 25.
 Halt mode: CPU and peripheral clocks are stopped, the device remains powered on.
The RAM content is preserved. The wakeup is triggered by an external interrupt or
reset. A few peripherals have also a wakeup from Halt capability. Switching off the
internal reference voltage reduces power consumption. Through software configuration
it is also possible to wake up the device without waiting for the internal reference
voltage wakeup time to have a fast wakeup time of 5 µs. Halt consumption: refer to
Table 26.
3.2 Central processing unit STM8
3.2.1 Advanced STM8 Core
The 8-bit STM8 core is designed for code efficiency and performance with an Harvard
architecture and a 3-stage pipeline.
It contains 6 internal registers which are directly addressable in each execution context, 20
addressing modes including indexed indirect and relative addressing, and 80 instructions.