Datasheet

STM8L151x2, STM8L151x3 Memory and register map
Doc ID 018780 Rev 4 31/112
5 Memory and register map
5.1 Memory mapping
The memory map is shown in Figure 8.
Figure 8. Memory map
1. Table 5 lists the boundary addresses for each memory size. The top of the stack is at the RAM end
address.
2. The VREFINT_Factory_CONV byte represents the LSB of the V
REFINT
12-bit ADC1 conversion result. The
GPIO and peripheral registers
0x00 0000
Low densit y
(up to 8 Kbyt es)
Reset and interrupt vectors
0x0 0 10FF
RAM
0x0 0 03FF
( Kbyte)
(512 bytes)
0x00 1100
Da ta E EP RO M
0x00 4800
0x0 0 487F
0x00 4880
0x00 7 FFF
0x00 8000
0x00 9FFF
0x0 0 100 0
0x0 0 47FF
0x00 7EFF
0x00 8100
0 x00 80FF
0 x00 7F0 0
Reserved
Re ser ved
in cl ud in g
Stack
(
256 Bytes)
Option byte s
0x00 4 FFF
0x00 5000
0x0 0 5457
0x00 5458
Re ser ved
0x00 5 FFF
Boot ROM
0x00 6000
0x0 0 67FF
(2 Kbytes)
0x00 6800
Re ser ved
CPU/SWIM/Debug/ITC
Re gi ste rs
Flash program memory
0x00 4910
0x00 4911
0x00 4926
0x00 4925
0x00 4931
0x00 4932
0x00 4909
VREFINT_Factory_CONV
TS_Factory_CONV_V90
0x00 4912
Re ser ved
Unique ID
Re ser ved
MS18274V2
6QUP
Reserved
0x0 0 0400
0x0 0 1FFF
RI
Reserved
0x00 5000
0x00 501E
0x00 5050
0x00 5055
0x00 5070
0x00 509D
0x00 50A0
0x00 50A6
0x00 50AA
0x00 50A9
0x00 50B0
0x00 50B2
0x00 50B4
0x00 50C0
0x00 50D1
0x00 50D3
0x00 50D5
0x00 50E0
0x00 50E3
0x00 50F0
0x00 50F4
0x00 5040
0x00 5191
0x00 5200
0x00 5208
0x00 5210
0x00 521F
0x00 5230
0x00 523B
0x00 5250
0x00 5267
0x00 5280
0x00 5297
0x00 52E0
0x00 52EA
0x00 52FF
0x00 5317
0x00 5340
0x00 53C8
0x00 5430
0x00 5440
0x00 5445
0x00 5450
0x00 5457
Reserved
GPIO ports
Flash
Reserved
DMA1
SYSCFG
ITC-EXT1
WFE
RST
PWR
CLK
WWDG
ITC-EXT1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
IWDG
BEEP
RTC
SPI1
I2C1
USART1
TIM2
TIM3
Reserved
Reserved
Reserved
TIM4
IRTIM
ADC1
COMP1/COMP2
RI