Datasheet

Electrical parameters STM8L15xx8, STM8L15xR6
96/134 DocID17943 Rev 6
Table 38. I/O static characteristics
Symbol Parameter
Conditions
(1)
Min.
Typ.
Max. Unit
V
IL
Input low level voltage
(2)
Input voltage on true
open-drain pins (PC0
and PC1)
Vss-0.3
0.3 x V
DD
VInput voltage on five-
volt tolerant (FT) pins
Vss-0.3
0.3 x V
DD
Input voltage on any
other pin
Vss-0.3
0.3 x V
DD
V
IH
Input high level voltage
(2)
Input voltage on true
open-drain pins (PC0
and PC1)
with V
DD
< 2 V
0.70 x V
DD
5.2
V
Input voltage on true
open-drain pins (PC0
and PC1)
with V
DD
2 V
5.5
Input voltage on five-
volt tolerant (FT) pins
with V
DD
< 2 V
0.70 x V
DD
5.2
Input voltage on five-
volt tolerant (FT) pins
with V
DD
2 V
5.5
Input voltage on any
other pin
0.70 x V
DD
V
DD
+0.3
V
hys
Schmitt trigger voltage hysteresis
(3)
Standard I/Os 200
mV
True open drain I/Os 200
I
lkg
Input leakage current
(4)
V
SS
V
IN
V
DD
Standard I/Os
--50
(5)
nA
V
SS
V
IN
V
DD
True open drain I/Os
- - 200
(5)
V
SS
V
IN
V
DD
PA0 with high sink LED
driver capability
- - 200
(5)
R
PU
Weak pull-up equivalent
resistor
(2)(6)
V
IN
=V
SS
30 45 60 kΩ
C
IO
I/O pin capacitance 5 pF
1. V
DD
= 3.0 V, T
A
= -40 to 125 °C unless otherwise specified.
2. Data based on characterization results, not tested in production.
3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
4. The max. value may be exceeded if negative current is injected on adjacent pins.
5. Not tested in production.
6. R
PU
pull-up equivalent resistor based on a resistive transistor (corresponding I
PU
current characteristics described in
Figure 28).