Datasheet

DocID17943 Rev 6 85/134
STM8L15xx8, STM8L15xR6 Electrical parameters
121
Figure 19. Typical I
DD(AH)
vs. V
DD
(LSI clock source)
7. RTC enabled. Clock source = LSE
8. Wakeup time until start of interrupt vector fetch.
The first word of interrupt routine is fetched 4 CPU cycles after t
WU
.
9. ULP=0 or ULP=1 and FWU=1 in the PWR_CSR2 register.
Table 25. Typical current consumption in Active-halt mode, RTC clocked by LSE
external crystal
Symbol Parameter Condition
(1)
Typ. Unit
I
DD(AH)
(2)
Supply current in Active-halt
mode
V
DD
= 1.8 V
LSE 1.2
µA
LSE/32
(3)
0.9
V
DD
= 3 V
LSE 1.4
LSE/32
(3)
1.1
V
DD
= 3.6 V
LSE 1.6
LSE/32
(3)
1.3
1. No floating I/O, unless otherwise specified.
2. Based on measurements on bench with 32.768 kHz external crystal oscillator.
3. RTC clock is LSE divided by 32.
0
0.005
0.01
0.015
0.02
1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6
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85°C
105°C
125°C
-40°C
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