Datasheet

Interrupt vector mapping STM8L15xx8, STM8L15xR6
60/134 DocID17943 Rev 6
6 Interrupt vector mapping
Table 11. Interrupt mapping
IRQ
No.
Source
block
Description
Wakeup
from Halt
mode
Wakeup
from
Active-halt
mode
Wakeup
from Wait
(WFI
mode)
Wakeup
from Wait
(WFE
mode)
(1)
Vector
address
RESET Reset Yes Yes Yes Yes 0x00 8000
TRAP Software interrupt - - - - 0x00 8004
0TLI
(2)
External Top level Interrupt - - - - 0x00 8008
1 FLASH EOP/WR_PG_DIS - - Yes Yes
(3)
0x00 800C
2 DMA1 0/1 DMA1 channels 0/1 - - Yes Yes
(3)
0x00 8010
3 DMA1 2/3 DMA1 channels 2/3 - - Yes Yes
(3)
0x00 8014
4
RTC/LSE_
CSS
RTC alarm interrupt/LSE
CSS interrupt
Yes Yes Yes Yes 0x00 8018
5
EXTI
E/F/PVD
(4)
PortE/F interrupt/PVD
interrupt
Yes Yes Yes Yes
(3)
0x00 801C
6 EXTIB/G External interrupt port B/G Yes Yes Yes Yes
(3)
0x00 8020
7 EXTID/H External interrupt port D/H Yes Yes Yes Yes
(3)
0x00 8024
8 EXTI0 External interrupt 0 Yes Yes Yes Yes
(3)
0x00 8028
9 EXTI1 External interrupt 1 Yes Yes Yes Yes
(3)
0x00 802C
10 EXTI2 External interrupt 2 Yes Yes Yes Yes
(3)
0x00 8030
11 EXTI3 External interrupt 3 Yes Yes Yes Yes
(3)
0x00 8034
12 EXTI4 External interrupt 4 Yes Yes Yes Yes
(3)
0x00 8038
13 EXTI5 External interrupt 5 Yes Yes Yes Yes
(3)
0x00 803C
14 EXTI6 External interrupt 6 Yes Yes Yes Yes
(3)
0x00 8040
15 EXTI7 External interrupt 7 Yes Yes Yes Yes
(3)
0x00 8044
16 LCD LCD interrupt - - Yes Yes 0x00 8048
17
CLK/
TIM1/
DAC
System clock switch/CSS
interrupt/TIM1 break/DAC
- - Yes Yes 0x00 804C
18
COMP1/
COMP2
ADC1
Comparator 1 and 2
interrupt/ADC1
Yes Yes Yes Yes
(3)
0x00 8050
19
TIM2/
USART2
TIM2 update
/overflow/trigger/break/
USART2 transmission
complete/transmit data
register empty
interrupt
--YesYes
(3)
0x00 8054