Datasheet

DocID17943 Rev 6 23/134
STM8L15xx8, STM8L15xR6 Functional overview
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It is clocked by the internal LSI RC clock source, and thus stays active even in case of a
CPU clock failure.
3.16 Beeper
The beeper function outputs a signal on the BEEP pin for sound generation. The signal is in
the range of 1, 2 or 4 kHz.
3.17 Communication interfaces
3.17.1 SPI
The serial peripheral interfaces (SPI1 and SPI2) provide half/ full duplex synchronous serial
communication with external devices.
• Maximum speed: 8 Mbit/s (f
SYSCLK
/2) both for master and slave
• Full duplex synchronous transfers
• Simplex synchronous transfers on 2 lines with a possible bidirectional data line
• Master or slave operation - selectable by hardware or software
• Hardware CRC calculation
• Slave/master selection input pin
Note: SPI1 and SPI2 can be served by the DMA1 Controller.
3.17.2 I
2
C
The I
2
C bus interface (I2C1) provides multi-master capability, and controls all I²C bus-
specific sequencing, protocol, arbitration and timing.
• Master, slave and multi-master capability
• Standard mode up to 100 kHz and fast speed modes up to 400 kHz.
• 7-bit and 10-bit addressing modes.
• SMBus 2.0 and PMBus support
• Hardware CRC calculation
Note: I
2
C1 can be served by the DMA1 Controller.