Datasheet

DocID17943 Rev 6 111/134
STM8L15xx8, STM8L15xR6 Electrical parameters
121
9.3.13 12-bit DAC characteristics
In the following table, data are guaranteed by design, not tested in production.
Table 50. DAC characteristics
Symbol Parameter Conditions Min. Typ. Max. Unit
V
DDA
Analog supply voltage 1.8 3.6
V
V
REF+
Reference supply voltage 1.8
V
DDA
I
VREF
Current consumption on V
REF+
supply
V
REF+
= 3.3 V, no load,
middle code (0x800)
130 220
µA
V
REF+
= 3.3 V, no load,
worst code (0x000)
220 350
I
VDDA
Current consumption on V
DDA
supply
V
DDA
= 3.3 V, no load,
middle code (0x800)
210 320
V
DDA
= 3.3 V, no load,
worst code (0x000)
320 520
T
A
Temperature range -40 125 °C
R
L
(1)
(2)
Resistive load DACOUT buffer ON 5 kΩ
R
O
Output impedance DACOUT buffer OFF 8 10 kΩ
C
L
(3)
Capacitive load 50 pF
DAC_OUT
(4)
DAC_OUT voltage
DACOUT buffer ON 0.2 V
DDA
- 0.2 V
DACOUT buffer OFF 0 V
REF+
-1 LSB V
t
settling
Settling time (full scale: for a 12-
bit input code transition between
the lowest and the highest input
codes when DAC_OUT reaches
the final value ±1LSB
)
R
L
≥ 5 kΩ, C
L
≤ 50 pF
712µs
Update rate
Max frequency for a correct
DAC_OUT (@95%) change
when small variation of the input
code (from code i to i+1LSB).
R
L
≥ 5kΩ, C
L
≤ 50 pF
1 Msps
t
WAKEUP
Wakeup time from OFF state.
Input code between lowest and
highest possible codes.
R
L
≥ 5kΩ, C
L
≤ 50 pF
915µs
PSRR+
Power supply rejection ratio (to
V
DDA
) (static DC measurement)
R
L
≥ 5kΩ, C
L
≤ 50 pF
-60 -35 dB
1. Resistive load between DACOUT and GNDA
2. Output on PF0 or PF1
3. Capacitive load at DACOUT pin
4. It gives the output excursion of the DAC