Datasheet

Electrical parameters STM8L15xx8, STM8L15xR6
102/134 DocID17943 Rev 6
9.3.8 Communication interfaces
SPI1 - Serial peripheral interface
Unless otherwise specified, the parameters given in Table 43 are derived from tests
performed under ambient temperature, f
SYSCLK
frequency and V
DD
supply voltage
conditions summarized in Section 9.3.1. Refer to I/O port characteristics for more details on
the input/output alternate function characteristics (NSS, SCK, MOSI, MISO).
Table 43. SPI1 characteristics
Symbol Parameter Conditions
(1)
Min. Max. Unit
f
SCK
1/t
c(SCK)
SPI1 clock frequency
Master mode 0 8
MHz
Slave mode 0 8
t
r(SCK)
t
f(SCK)
SPI1 clock rise and fall
time
Capacitive load: C = 30 pF - 30 ns
t
su(NSS)
(2)
NSS setup time Slave mode 4 x 1/f
SYSCLK
-
t
h(NSS)
(2)
NSS hold time Slave mode 80 -
t
w(SCKH)
(2)
t
w(SCKL)
(2)
SCK high and low time
Master mode,
f
MASTER
= 8 MHz, f
SCK
= 4 MHz
105 145
t
su(MI)
(2)
t
su(SI)
(2)
Data input setup time
Master mode 30 -
Slave mode 3 -
t
h(MI)
(2)
t
h(SI)
(2)
Data input hold time
Master mode 15 -
Slave mode 0 -
t
a(SO)
(2)(3)
Data output access time Slave mode - 3x 1/f
SYSCLK
t
dis(SO)
(2)(4)
Data output disable time Slave mode 30 -
t
v(SO)
(2)
Data output valid time Slave mode (after enable edge) - 60
t
v(MO)
(2)
Data output valid time
Master mode (after enable
edge)
-20
t
h(SO)
(2)
Data output hold time
Slave mode (after enable edge) 15 -
t
h(MO)
(2)
Master mode (after enable
edge)
1-
1. Parameters are given by selecting 10 MHz I/O output frequency.
2. Values based on design simulation and/or characterization results, and not tested in production.
3. Min. time is for the minimum time to drive the output and max. time is for the maximum time to validate the data.
4. Min. time is for the minimum time to invalidate the output and max. time is for the maximum time to put the data in Hi-Z.