Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 48 (7x7) 8-Bit 16 MHz I/O number 41

This is information on a product in full production.

July 2013 DocID17943 Rev 6 1/134

STM8L151x8 STM8L152x8

STM8L151R6 STM8L152R6

8-bit ultralow power MCU, up to 64 KB Flash + 2 KB data EEPROM,

RTC, LCD, timers, USARTs, I2C, SPIs, ADC, DAC, comparators

Datasheet - production data

Features

• Operating conditions

– Operating power supply: 1.65 to 3.6 V

(without BOR), 1.8 to 3.6 V (with BOR)

– Temp. range: -40 to 85, 105 or 125 °C

• Low power features

– 5 low power modes: Wait, Low power run

(5.9 µA), Low power wait (3 µA), Active-halt

with full RTC (1.4 µA), Halt (400 nA)

– Consumption: 200 µA/MHz+330 µA

– Fast wake up from Halt mode (4.7 µs)

– Ultra low leakage per I/0: 50 nA

• Advanced STM8 core

– Harvard architecture and 3-stage pipeline

– Max freq: 16 MHz, 16 CISC MIPS peak

– Up to 40 external interrupt sources

• Reset and supply management

– Low power, ultrasafe BOR reset with 5

programmable thresholds

– Ultralow power POR/PDR

– Programmable voltage detector (PVD)

• Clock management

– 32 kHz and 1-16 MHz crystal oscillators

– Internal 16 MHz factory-trimmed RC and

38 kHz low consumption RC

– Clock security system

• Low power RTC

– BCD calendar with alarm interrupt,

– Digital calibration with +/- 0.5ppm accuracy

– Advanced anti-tamper detection

• DMA

– 4 ch. for ADC, DACs, SPIs, I

C, USARTs,

Timers, 1 ch. for memory-to-memory

• LCD: 8x40 or 4x44 w/ step-up converter

• 12-bit ADC up to 1 Msps/28 channels

– Temp. sensor and internal ref. voltage

• Memories

– Up to 64 KB of Flash memory with up to 2

KB of data EEPROM with ECC and RWW

– Flexible write/read protection modes

– Up to 4 KB of RAM

• 2x12-bit DAC (dual mode) with output buffer

• 2 ultralow power comparators

– 1 with fixed threshold and 1 rail to rail

– Wakeup capability

• Timers

– Three 16-bit timers with 2 channels (IC,

OC, PWM), quadrature encoder

– One 16-bit advanced control timer with 3

channels, supporting motor control

– One 8-bit timer with 7-bit prescaler

– 1 Window and 1 independent watchdog

– Beeper timer with 1, 2 or 4 kHz frequencies

• Communication interfaces

– Two synchronous serial interface (SPI)

–Fast I

C 400 kHz SMBus and PMBus

– Three USARTs (ISO 7816 interface + IrDA)

• Up to 67 I/Os, all mappable on interrupt vectors

• Up to 16 capacitive sensing channels

supporting touchkey, proximity, linear touch

and rotary touch sensors

• Fast on-chip programming and non-intrusive

debugging with SWIM, Bootloader using

USART

• 96-bit unique ID

Table 1. Device summary

Reference Part number

STM8L151x8

STM8L152x8

STM8L151C8, STM8L152C8, STM8L151R8,

STM8L152R8, STM8L151M8, STM8L152M8

STM8L151R6

STM8L152R6

STM8L151R6, STM8L152R6

LQFP80 LQFP64 LQFP48

UFQFPN48

www.st.com

Summary of content (134 pages)

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STM8L151x8 STM8L152x8 STM8L151R6 STM8L152R6 8-bit ultralow power MCU, up to 64 KB Flash + 2 KB data EEPROM, RTC, LCD, timers, USARTs, I2C, SPIs, ADC, DAC, comparators Datasheet - production data Features • Operating conditions – Operating power supply: 1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR) – Temp. range: -40 to 85, 105 or 125 °C • Low power features – 5 low power modes: Wait, Low power run (5.9 µA), Low power wait (3 µA), Active-halt with full RTC (1.
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Contents STM8L15xx8, STM8L15xR6 Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 2.1 STM8L Ultralow power 8-bit family benefits . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 2.
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STM8L15xx8, STM8L15xR6 3.15.2 Contents Independent watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.16 Beeper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.17 Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.17.1 SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.17.2 I2C . . . . . . . .
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Contents STM8L15xx8, STM8L15xR6 9.4 10 9.3.8 Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 9.3.9 LCD controller (STM8L152xx only) . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 9.3.10 Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 9.3.11 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 9.3.12 Comparator characteristics . . . . . . . .
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STM8L15xx8, STM8L15xR6 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46.
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List of tables Table 47. Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. 6/134 STM8L15xx8, STM8L15xR6 TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 Comparator 1 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM8L15xx8, STM8L15xR6 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42.
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List of figures Figure 48. Figure 49. Figure 50. Figure 51. Figure 52. Figure 53. Figure 54. 8/134 STM8L15xx8, STM8L15xR6 LQFP80 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 LQFP64, 10 x 10 mm, 64-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . 125 LQFP64 Recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM8L15xx8, STM8L15xR6 1 Introduction Introduction This document describes the features, pinout, mechanical data and ordering information for: • High density STM8L15xxx devices: STM8L151x8 and STM8L152x8 microcontrollers with a Flash memory density of 64 Kbytes. • Medium+ density STM8L15xxx devices: STM8L151R6 and STM8L152R6 microcontrollers with Flash memory density of 32 Kbytes. For further details on the STMicroelectronics Ultralow power family please refer to Section 2.
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Description 2.1 STM8L15xx8, STM8L15xR6 STM8L Ultralow power 8-bit family benefits High density and medium+ density STM8L15xx devices are part of the STM8L Ultralow power family providing the following benefits: • • • • Integrated system – Up to 64 Kbytes of high-density embedded Flash program memory – Up to 2 Kbytes of data EEPROM – Up to 4 Kbytes of RAM – Internal high-speed and low-power low speed RC.
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STM8L15xx8, STM8L15xR6 2.2 Description Device overview Table 2.
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Description 2.3 STM8L15xx8, STM8L15xR6 Ultralow power continuum The Ultralow power STM8L151xx and STM8L152xx are fully pin-to-pin, software and feature compatible. Besides the full compatibility within the family, the devices are part of STMicroelectronics microcontrollers UltraLow power strategy which also includes STM8L101xx and STM32L15xxx. The STM8L and STM32L families allow a continuum of performance, peripherals, system architecture, and features. They are all based on STMicroelectronics 0.
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STM8L15xx8, STM8L15xR6 3 Functional overview Functional overview Figure 1. High density and medium+ density STM8L15xx device block diagram /3#?). /3#?/54 6$$ -(Z OSCILLATOR -(Z INTERNAL 2# /3# ?).
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Functional overview STM8L15xx8, STM8L15xR6 LCD: Liquid crystal display POR/PDR: Power on reset / power-down reset RTC: Real-time clock SPI: Serial peripheral interface SWIM: Single wire interface module USART: Universal synchronous asynchronous receiver transmitter WWDG: Window watchdog 3.
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STM8L15xx8, STM8L15xR6 Functional overview 3.2 Central processing unit STM8 3.2.1 Advanced STM8 Core The 8-bit STM8 core is designed for code efficiency and performance with an Harvard architecture and a 3-stage pipeline. It contains 6 internal registers which are directly addressable in each execution context, 20 addressing modes including indexed indirect and relative addressing, and 80 instructions.
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Functional overview STM8L15xx8, STM8L15xR6 3.3 Reset and supply management 3.3.1 Power supply scheme The device requires a 1.65 V to 3.6 V operating supply voltage (VDD). The external power supply pins must be connected as follows: 3.3.2 • VSS1, VDD1, VSS2, VDD2, VSS3, VDD3, VSS4, VDD4= 1.65 to 3.6 V: external power supply for I/Os and for the internal regulator. Provided externally through VDD pins, the corresponding ground pin is VSS.
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STM8L15xx8, STM8L15xR6 3.3.3 Functional overview Voltage regulator The high density and medium+ density STM8L15xx devices embed an internal voltage regulator for generating the 1.8 V power supply for the core and peripherals. This regulator has two different modes: • Main voltage regulator mode (MVR) for Run, Wait for interrupt (WFI) and Wait for event (WFE) modes. • Low power voltage regulator mode (LPVR) for Halt, Active-halt, Low power run and Low power wait modes.
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Functional overview STM8L15xx8, STM8L15xR6 Figure 2. Clock tree diagram #33 /3#?/54 /3#?). (3% (3% /3# -(Z 393#,+ TO CORE AND (3) (3) 2# -(Z MEMORY 393#,+ 0RESCALER ,3) ,3% 0ERIPHERAL #LOCK ENABLE BITS ,3% "%%0#,+ TO "%%0 #,+"%%03%,; = ,3) ,3) 2# K (Z 24#3%,; = /3# ?/54 /3# ?). 24##,+ #33?,3% ##/ 3.
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STM8L15xx8, STM8L15xR6 3.6 Functional overview LCD (Liquid crystal display) The LCD is only available on STM8L152xx devices. The liquid crystal display drives up to 8 common terminals and up to 40 segment terminals to drive up to 320 pixels. It can also be configured to drive up to 4 common and 44 segments (up to 176 pixels). • Internal step-up converter to guarantee contrast control whatever VDD. • Static 1/2, 1/3, 1/4, 1/8 duty supported. • Static 1/2, 1/3, 1/4 bias supported.
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Functional overview 3.
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STM8L15xx8, STM8L15xR6 3.12 Functional overview System configuration controller and routing interface The system configuration controller provides the capability to remap some alternate functions on different I/O ports. TIM4 and ADC1 DMA channels can also be remapped. The highly flexible routing interface allows application software to control the routing of different I/Os to the TIM1 timer input captures.
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Functional overview 3.14.1 STM8L15xx8, STM8L15xR6 16-bit advanced control timer (TIM1) This is a high-end timer designed for a wide range of control applications. With its complementary outputs, dead-time control and center-aligned PWM capability, the field of applications is extended to motor control, lighting and half-bridge driver. 3.14.2 3.14.
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STM8L15xx8, STM8L15xR6 Functional overview It is clocked by the internal LSI RC clock source, and thus stays active even in case of a CPU clock failure. 3.16 Beeper The beeper function outputs a signal on the BEEP pin for sound generation. The signal is in the range of 1, 2 or 4 kHz. 3.17 Communication interfaces 3.17.1 SPI The serial peripheral interfaces (SPI1 and SPI2) provide half/ full duplex synchronous serial communication with external devices.
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Functional overview 3.17.3 STM8L15xx8, STM8L15xR6 USART The USART interfaces (USART1, USART2 and USART3) allow full duplex, asynchronous communications with external devices requiring an industry standard NRZ asynchronous serial data format. It offers a very wide range of baud rates.
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STM8L15xx8, STM8L15xR6 Pin description 0) 0) 0) 0) 0% 0% 0# 0# 0# 0# 0# 0# 633 6 $$ 0# 0# 0' 0' 0' 0' Figure 3. STM8L151M8 80-pin package pinout (without LCD) 0( 0( 0( 0( 0! .
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Pin description STM8L15xx8, STM8L15xR6 0% 0% 0# 0# 0# 0# 0# 0# 6 33 6 $$ 0# 0# 0' 0' 0' 0' Figure 5. STM8L151R8 and STM8L151R6 64-pin pinout (without LCD) 0! .
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STM8L15xx8, STM8L15xR6 Pin description 0% 0% 0# 0# 0# 0# 0# 0# 6 33 6 $$ 0# 0# Figure 7. STM8L151C8 48-pin pinout (without LCD) 0! .234 0! 0! 0! 0! 0! 0! 0! 633 633! 62%& 6$$ 6$$! 62%& 0$ 0$ 0$ 0$ 0& 0" 0" 0" 0" 0" 0" 0" 0% 0% 0% 0% 0% 0% 0$ 0$ 0$ 0$ 0" 2ES AI 1. Pin 13 is reserved and must be tied to VDD.
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Pin description STM8L15xx8, STM8L15xR6 Table 4. Legend/abbreviation Type I= input, O = output, S = power supply FT: Five-volt tolerant Level Output HS = high sink/source (20 mA) Port and control Input configuration Output float = floating, wpu = weak pull-up T = true open drain, OD = open drain, PP = push pull Bold X (pin state after reset release). Unless otherwise specified, the pin state is the same during the reset phase (i.e. “under reset”) and after internal reset release (i.e.
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STM8L15xx8, STM8L15xR6 Pin description Table 5.
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Pin description STM8L15xx8, STM8L15xR6 Table 5. High density and medium+ density STM8L15x pin description (continued) - - 45 37 - - PB5/SPI1_SCK/ LCD_SEG15(3)/ADC1_IN13 29 I/O FT(5) X /DAC_OUT2/ [COMP1_INP] PB6/SPI1_MOSI/ - LCD_SEG16(3)/ADC1_IN12 I/O FT(5) X /[COMP1_INP] PB6/SPI1_MOSI/ 30 LCD_SEG16(3)/ADC1_IN12 I/O FT(5) X /DAC_OUT2/[COMP1_INP] X X X Main function (after reset) PP OD High sink/source Output Ext.
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STM8L15xx8, STM8L15xR6 Pin description Table 5. High density and medium+ density STM8L15x pin description (continued) 71 59 - - PC4/USART1_CK/ I2C1_SMB/ [CCO](2)/ - LCD_SEG24(3)/ ADC1_IN4/[COMP2_INM] /[COMP1_INP] I/O FT(5) X PC4/USART1_CK/ I2C1_SMB/[CCO](2)/ LCD_SEG24(3)/ADC1_IN4/ 43 I/O FT(5) X [COMP2_INM] / [COMP1_INP] / [LCD_COM4] Main function (after reset) PP OD High sink/source Output Ext.
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Pin description STM8L15xx8, STM8L15xR6 Table 5. High density and medium+ density STM8L15x pin description (continued) PD0/TIM3_CH2/ [ADC1_TRIG](2)/ 29 25 20 I/O FT(5) X LCD_SEG7(3)/ADC1_IN22/ [COMP2_INP] X Main function (after reset) PP OD High sink/source Output Ext.
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STM8L15xx8, STM8L15xR6 Pin description Table 5. High density and medium+ density STM8L15x pin description (continued) - 60 48 - - PD6/TIM1_BKIN /LCD_SEG20(3)/ 35 ADC1_IN8/RTC_CALIB/ SPI2_SCK/[COMP1_INP]/ VREFINT PD7/TIM1_CH1N /LCD_SEG21(3)/ ADC1_IN7/RTC_ALARM/ [COMP1_INP]/VREFINT I/O FT(5) X I/O FT(5) X I/O FT(5) X PD7/TIM1_CH1N /LCD_SEG21(3)/ I/O FT(5) X 36 ADC1_IN7/RTC_ALARM /SPI2_NSS/[COMP1_INP]/ VREFINT Main function (after reset) PP OD High sink/source Output Ext.
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Pin description STM8L15xx8, STM8L15xR6 Table 5.
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STM8L15xx8, STM8L15xR6 Pin description Table 5. High density and medium+ density STM8L15x pin description (continued) I/O FT(5) X X - - PI1/RTC_TAMP2/ [SPI2_SCK] I/O FT(5) X 79 - - PI2/RTC_TAMP3/ [SPI2_MOSI] 80 - - - - 32 - 39 - 49 78 Main function (after reset) Ext.
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Pin description STM8L15xx8, STM8L15xR6 Table 5.
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STM8L15xx8, STM8L15xR6 Pin description Table 5.
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Pin description STM8L15xx8, STM8L15xR6 5. In the 5 V tolerant I/Os, the protection diode to VDD is not implemented. 6. In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer, weak pull-up and protection diode to VDD are not implemented). 7. Available on STM8L152xx devices only. On STM8L151xx devices it is reserved and must be tied to VDD. 8. The PA0 pin is in input pull-up during the reset phase and after reset release. 9. High Sink LED driver capability available on PA0.
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STM8L15xx8, STM8L15xR6 Memory and register map 5 Memory and register map 5.1 Memory mapping The memory map is shown in Figure 9. Figure 9.
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Memory and register map STM8L15xx8, STM8L15xR6 Table 6. Flash and RAM boundary addresses Memory area Size Start address End address 2 Kbytes 0x00 0000 0x00 07FF 4 Kbytes 0x00 0000 0x00 0FFF 32 Kbytes 0x00 8000 0x00 FFFF 64 Kbytes 0x00 8000 0x01 7FFF RAM Flash program memory 5.2 Register map Table 7.
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STM8L15xx8, STM8L15xR6 Memory and register map Table 8.
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Memory and register map STM8L15xx8, STM8L15xR6 Table 9.
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STM8L15xx8, STM8L15xR6 Memory and register map Table 9.
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Memory and register map STM8L15xx8, STM8L15xR6 Table 9.
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STM8L15xx8, STM8L15xR6 Memory and register map Table 9.
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Memory and register map STM8L15xx8, STM8L15xR6 Table 9.
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STM8L15xx8, STM8L15xR6 Memory and register map Table 9.
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Memory and register map STM8L15xx8, STM8L15xR6 Table 9.
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STM8L15xx8, STM8L15xR6 Memory and register map Table 9.
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Memory and register map STM8L15xx8, STM8L15xR6 Table 9.
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STM8L15xx8, STM8L15xR6 Memory and register map Table 9.
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Memory and register map STM8L15xx8, STM8L15xR6 Table 9.
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STM8L15xx8, STM8L15xR6 Memory and register map Table 9.
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Memory and register map STM8L15xx8, STM8L15xR6 Table 9.
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STM8L15xx8, STM8L15xR6 Memory and register map Table 9.
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Memory and register map STM8L15xx8, STM8L15xR6 Table 9.
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STM8L15xx8, STM8L15xR6 Memory and register map Table 9.
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Memory and register map STM8L15xx8, STM8L15xR6 Table 10.
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STM8L15xx8, STM8L15xR6 Memory and register map Table 10.
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Interrupt vector mapping 6 STM8L15xx8, STM8L15xR6 Interrupt vector mapping Table 11. Interrupt mapping IRQ No.
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STM8L15xx8, STM8L15xR6 Interrupt vector mapping Table 11.
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Option bytes 7 STM8L15xx8, STM8L15xR6 Option bytes Option bytes contain configurations for device hardware features as well as the memory protection of the device. They are stored in a dedicated memory block. All option bytes can be modified in ICP mode (with SWIM) by accessing the EEPROM address. See Table 12 for details on option byte addresses.
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STM8L15xx8, STM8L15xR6 Option bytes Table 13. Option byte description Option byte no. Option description OPT0 ROP[7:0] Memory readout protection (ROP) 0xAA: Disable readout protection (write access via SWIM protocol) Refer to Readout protection section in the STM8L reference manual (RM0031). OPT1 UBC[7:0] Size of the user boot code area UBC[7:0] Size of the user boot code area 0x00: No UBC 0x01: Page 0 reserved for the UBC and write protected. ...
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Option bytes STM8L15xx8, STM8L15xR6 Table 13. Option byte description (continued) Option byte no. OPT5 Option description BOR_ON: 0: Brownout reset off 1: Brownout reset on BOR_TH[3:1]: Brownout reset thresholds. Refer to Table 20 for details on the thresholds according to the value of BOR_TH bits. OPTBL 64/134 OPTBL[15:0]: This option is checked by the boot ROM code after reset.
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STM8L15xx8, STM8L15xR6 8 Unique ID Unique ID STM8 devices feature a 96-bit unique device identifier which provides a reference number that is unique for any device and in any context. The 96 bits of the identifier can never be altered by the user. The unique device identifier can be read in single bytes and may then be concatenated using a custom algorithm.
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Electrical parameters STM8L15xx8, STM8L15xR6 9 Electrical parameters 9.1 Parameter conditions Unless otherwise specified, all voltages are referred to VSS. 9.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and frequencies by tests in production on 100% of the devices with an ambient temperature at TA= 25 °C and TA = TA max (given by the selected temperature range).
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STM8L15xx8, STM8L15xR6 9.1.5 Electrical parameters Pin input voltage The input voltage measurement on a pin of the device is described in Figure 11. Figure 11. Pin input voltage 34- , 0). 6). MS32618V1 9.2 Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied.
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Electrical parameters STM8L15xx8, STM8L15xR6 Table 16. Current characteristics Symbol Ratings Max.
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STM8L15xx8, STM8L15xR6 9.3 Electrical parameters Operating conditions Subject to general operating conditions for VDD and TA. 9.3.1 General operating conditions Table 18.
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Electrical parameters 9.3.2 STM8L15xx8, STM8L15xR6 Embedded reset and power control block characteristics Table 19. Embedded reset and power control block characteristics Symbol Parameter VDD rise time rate tVDD VDD fall time rate tTEMP VPOR Reset release delay Power-on reset threshold Conditions Min. Typ. Max.
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STM8L15xx8, STM8L15xR6 Electrical parameters Table 19. Embedded reset and power control block characteristics (continued) Symbol Parameter VPVD0 PVD threshold 0 VPVD1 PVD threshold 1 VPVD2 PVD threshold 2 VPVD3 PVD threshold 3 VPVD4 PVD threshold 4 VPVD5 PVD threshold 5 VPVD6 PVD threshold 6 Vhyst Hysteresis voltage Conditions Min. Typ. Max. Falling edge 1.80 1.84 1.88 Rising edge 1.88 1.94 1.99 Falling edge 1.98 2.04 2.09 Rising edge 2.08 2.14 2.18 Falling edge 2.
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Electrical parameters STM8L15xx8, STM8L15xR6 Figure 12.
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STM8L15xx8, STM8L15xR6 9.3.3 Electrical parameters Supply current characteristics Total current consumption The MCU is placed under the following conditions: • All I/O pins in input mode with a static value at VDD or VSS (no load) • All peripherals are disabled except if explicitly mentioned. In the following table, data are based on characterization results, unless otherwise specified. Subject to general operating conditions for VDD and TA. Table 20.
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Electrical parameters STM8L15xx8, STM8L15xR6 Table 20. Total current consumption in Run mode (continued) Symbol Para meter Max. Conditions(1) HSI RC osc.(9) All peripherals Supply OFF, code current executed IDD(RUN) in Run from Flash, VDD from mode 1.65 V to 3.6 V HSE external clock (fCPU=fHSE) (8) LSI RC osc. Typ. 55°C 85 °C 105 °C 125 °C (2) (3) (4) fCPU = 125 kHz 0.35 0.46 0.48 0.51 0.59 fCPU = 1 MHz 0.54 0.65 0.67 0.7 0.78 fCPU = 4 MHz 1.16 1.27 1.29 1.32 1.
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STM8L15xx8, STM8L15xR6 Electrical parameters Figure 13. Typical IDD(RUN) from RAM vs. VDD (HSI clock source), fCPU =16 MHz 2 1.8 1.6 )$$ 2UN (3) -(Z M! 1.4 1.2 25°C 1 85°C 0.8 105°C 125°C 0.6 -40°C 0.4 0.2 0 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 6$$ 6 -3 6 1. Typical current consumption measured with code executed from RAM. Figure 14. Typical IDD(RUN) from Flash vs. VDD (HSI clock source), fCPU = 16 MHz 4 )$$ 2UN (3) %%0 -(Z M! 3.5 3 25°C 85°C 105°C 2.
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Electrical parameters STM8L15xx8, STM8L15xR6 In the following table, data are based on characterization results, unless otherwise specified. Table 21. Total current consumption in Wait mode Max Symbol Parameter Conditions(1) 76/134 55°C 85 °C 105 °C 125 °C (2) (3) (4) fCPU = 125 kHz 0.21 0.29 0.33 0.36 0.43 fCPU = 1 MHz 0.25 0.33 0.37 0.4 0.47 fCPU = 4 MHz 0.32 0.4 0.44 0.47 0.54 fCPU = 8 MHz 0.42 0.496 0.54 0.56 0.64 fCPU = 16 MHz 0.66 0.736 0.78(6) 0.8(6) 0.
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STM8L15xx8, STM8L15xR6 Electrical parameters Table 21. Total current consumption in Wait mode (continued) Max Symbol Parameter Conditions(1) HSI CPU not clocked, all peripherals OFF, Supply code IDD(Wait) current in executed from Wait mode Flash, VDD from 1.65 V to 3.6 V HSE(7) external clock (fCPU= HSE) Typ 55°C 85 °C 105 °C 125 °C (2) (3) (4) fCPU = 125 kHz 0.27 0.36 0.42 0.46 0.51 fCPU = 1 MHz 0.29 0.38 0.44 0.48 0.53 fCPU = 4 MHz 0.37 0.46 0.52 0.56 0.61 fCPU = 8 MHz 0.
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Electrical parameters STM8L15xx8, STM8L15xR6 Figure 15. Typical IDD(Wait) from RAM vs. VDD (HSI clock source), fCPU = 16 MHz 0.8 0.7 IDD Wait HSI 16MHz (mA) 0.6 0.5 25°C 0.4 85°C -40°C 0.3 0.2 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VDD (V) MS19113V1 1. Typical current consumption measured with code executed from RAM. Figure 16. Typical IDD(Wait) from Flash (HSI clock source), fCPU = 16 MHz 0.8 IDD Wfi HSI 16MHz EEON (mA) 0.7 0.6 0.5 25°C 85°C 105°C 0.4 125°C -40°C 0.3 0.2 1.
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STM8L15xx8, STM8L15xR6 Electrical parameters In the following table, data are based on characterization results, unless otherwise specified. Table 22. Total current consumption and timing in Low power run mode at VDD = 1.65 V to 3.6 V Symbol Conditions(1) Parameter all peripherals OFF LSI RC osc. (at 38 kHz) with TIM2 active(2) IDD(LPR) Supply current in Low power run mode all peripherals OFF (3) external LSE clock (32.768 kHz) with TIM2 active (2) Typ. Max. TA = -40 °C to 25 °C 5.86 6.
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Electrical parameters STM8L15xx8, STM8L15xR6 Figure 17. Typical IDD(LPR) vs. VDD (LSI clock source), all peripherals OFF 0.02 25°C 0.015 IDD Lp Run LSI all off (mA) 85°C 0.01 0.005 0 1.8 2 2.2 2.4 2.6 2.8 VDD (V) 80/134 DocID17943 Rev 6 3 3.2 3.4 3.
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STM8L15xx8, STM8L15xR6 Electrical parameters In the following table, data are based on characterization results, unless otherwise specified. Table 23. Total current consumption in Low power wait mode at VDD = 1.65 V to 3.6 V Symbol Conditions(1) Parameter all peripherals OFF LSI RC osc. (at 38 kHz) with TIM2 active(2) IDD(LPW) Supply current in Low power wait mode all peripherals OFF LSE external clock(3) (32.768 kHz) with TIM2 active (2) Typ. Max. Unit TA = -40 °C to 25 °C 3.03 3.
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Electrical parameters STM8L15xx8, STM8L15xR6 Figure 18. Typical IDD(LPW) vs. VDD (LSI clock source), all peripherals OFF 25°C 0.02 85°C 105°C 125°C -40°C )$$ ,P7FI RAM ,3) ALLOFF M! 0.015 0.01 0.005 0 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 6$$ 6 .4 7 1. Typical current consumption measured with code executed from RAM.
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STM8L15xx8, STM8L15xR6 Electrical parameters In the following table, data are based on characterization results, unless otherwise specified. Table 24. Total current consumption and timing in Active-halt mode at VDD = 1.65 V to 3.6 V Symbol Conditions(1) Parameter LCD OFF (2) LCD ON (static duty/ external VLCD) (3) IDD(AH) Supply current in Active-halt mode LSI RC (at 38 kHz) LCD ON (1/4 duty/ external VLCD) (4) LCD ON (1/4 duty/ internal VLCD) (5) DocID17943 Rev 6 Typ. Max.
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Electrical parameters STM8L15xx8, STM8L15xR6 Table 24. Total current consumption and timing in Active-halt mode at VDD = 1.65 V to 3.6 V (continued) Symbol Conditions(1) Parameter LCD OFF IDD(AH) Supply current in Active-halt mode LSE external clock (32.768 kHz) LCD ON (static duty/ external VLCD) (3) (6) LCD ON (1/4 duty/ external VLCD) (4) LCD ON (1/4 duty/ internal VLCD) (5) IDD(WUFAH) (7) Supply current during wakeup time from Active-halt mode (using HSI) Typ. Max.
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STM8L15xx8, STM8L15xR6 Electrical parameters 7. RTC enabled. Clock source = LSE 8. Wakeup time until start of interrupt vector fetch. The first word of interrupt routine is fetched 4 CPU cycles after tWU. 9. ULP=0 or ULP=1 and FWU=1 in the PWR_CSR2 register. Table 25. Typical current consumption in Active-halt mode, RTC clocked by LSE external crystal Symbol Condition(1) Parameter LSE VDD = 1.8 V IDD(AH) (2) Supply current in Active-halt mode Typ. 1.2 (3) VDD = 3 V LSE/32 0.9 LSE 1.
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Electrical parameters STM8L15xx8, STM8L15xR6 In the following table, data are based on characterization results, unless otherwise specified. Table 26. Total current consumption and timing in Halt mode at VDD = 1.65 to 3.6 V Symbol Condition(1) Parameter Supply current in Halt mode (Ultra low power ULP bit =1 in the PWR_CSR2 register) IDD(Halt) Typ. Max. TA = -40 °C to 25 °C 400 1600(2) TA = 55 °C 810 2400 TA = 85 °C 1600 4500(2) TA = 105 °C 2900 7700(2) TA = 125 °C 5.
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STM8L15xx8, STM8L15xR6 Electrical parameters Current consumption of on-chip peripherals Table 27. Peripheral current consumption Symbol Typ. Parameter VDD = 3.
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Electrical parameters STM8L15xx8, STM8L15xR6 5. Data based on a differential IDD measurement between DAC in reset configuration and continuous DAC conversion of VDD /2. Floating DAC output. 6. Data based on a differential IDD measurement between COMP1 or COMP2 in reset configuration and COMP1 or COMP2 enabled with static inputs. Supply current of internal reference voltage excluded. 7. Including supply current of internal reference voltage. Table 28.
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STM8L15xx8, STM8L15xR6 Electrical parameters LSE external clock (LSEBYP=1 in CLK_ECKCR) The LSE is available on STM8L151xx and STM8L152xx devices only. Subject to general operating conditions for VDD and TA. Table 30. LSE external clock characteristics Symbol Parameter Min. Typ. Max. fLSE_ext(1) External clock source frequency VLSEH(2) OSC32_IN input pin high level voltage 0.7 x VDD VDD VLSEL(2) OSC32_IN input pin low level voltage VSS 0.3 x VDD 32.
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Electrical parameters STM8L15xx8, STM8L15xR6 Figure 21. HSE oscillator circuit diagram fHSE to core Rm RF CO Lm CL1 OSC_IN Cm gm Resonator Consumption control Resonator STM8 #L2 OSC_OUT .
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STM8L15xx8, STM8L15xR6 4. Electrical parameters tSU(LSE) is the startup time measured from the moment it is enabled (by software) to a stabilized 32.768 kHz oscillation. This value is measured for a standard crystal resonator and it can vary significantly with the crystal manufacturer. Figure 22.
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Electrical parameters STM8L15xx8, STM8L15xR6 3. The trimming step differs depending on the trimming code. It is usually negative on the codes which are multiples of 16 (0x00, 0x10, 0x20, 0x30...0xE0). Refer to the AN3101 “STM8L15x internal RC oscillator calibration” application note for more details. 4. Guaranteed by design, not tested in production Figure 23. Typical HSI frequency vs.
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STM8L15xx8, STM8L15xR6 Electrical parameters Figure 24. Typical LSI clock source frequency vs. VDD 0.04 25°C 85°C 105°C 0.038 125°C 2# + #HECK -(Z -40°C 0.036 0.034 0.032 0.03 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 6$$ 6 -3 6 9.3.5 Memory characteristics TA = -40 to 125 °C unless otherwise specified. Table 35. RAM and hardware registers Symbol VRM Parameter Data retention mode (1) Conditions Min. Halt mode (or Reset) 1.65 Typ. Max. Unit V 1.
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Electrical parameters STM8L15xx8, STM8L15xR6 Flash memory Table 36. Flash program and data EEPROM memory Symbol VDD tprog Iprog tRET(2) Parameter Operating voltage (all modes, read/write/erase) Min. fSYSCLK = 16 MHz 1.65 Typ. Programming time for 1 or 128 bytes (block) erase/write cycles (on programmed byte) 6 Programming time for 1 to 128 bytes (block) write cycles (on erased byte) 3 TA=+25 °C, VDD = 3.0 V Programming/ erasing consumption Max. (1) Unit 3.6 V ms 0.7 TA=+25 °C, VDD = 1.
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STM8L15xx8, STM8L15xR6 9.3.6 Electrical parameters I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below VSS or above VDD (for standard pins) should be avoided during normal product operation. However, in order to give an indication of the robustness of the microcontroller in cases when abnormal injection accidentally happens, susceptibility tests are performed on a sample basis during device characterization.
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Electrical parameters STM8L15xx8, STM8L15xR6 Table 38. I/O static characteristics Symbol VIL Parameter Input low level voltage(2) Conditions(1) 0.3 x VDD Input voltage on fivevolt tolerant (FT) pins Vss-0.3 0.3 x VDD Input voltage on any other pin Vss-0.3 0.
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STM8L15xx8, STM8L15xR6 Electrical parameters Figure 25. Typical VIL and VIH vs. VDD (standard I/Os) # # # # 6), AND 6)( ;6= 6$$ ;6= AI Figure 26. Typical VIL and VIH vs. VDD (true open drain I/Os) # # # # 6), AND 6)( ;6= 6$$ ;6= AI Figure 27. Typical pull-up resistance RPU vs.
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Electrical parameters STM8L15xx8, STM8L15xR6 Figure 28. Typical pull-up current Ipu vs. VDD with VIN=VSS # # # # 0ULL 5P CURRENT ;!= 6$$ ;6= AI Output driving current Subject to general operating conditions for VDD and TA unless otherwise specified. Table 39.
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STM8L15xx8, STM8L15xR6 Electrical parameters Table 40. Output driving current (true open drain ports) Open drain I/O Symbol Type VOL (1) Parameter Conditions Output low level voltage for an I/O pin Min. Max. IIO = +3 mA, VDD = 3.0 V 0.45 IIO = +1 mA, VDD = 1.8 V 0.45 Unit V 1. The IIO current sunk must always respect the absolute maximum rating specified in Table 16 and the sum of IIO (I/O ports and control pins) must not exceed IVSS. Table 41.
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Electrical parameters STM8L15xx8, STM8L15xR6 Figure 33. Typical VDD - VOH @ VDD = 3.0 V (high Figure 34. Typical VDD - VOH @ VDD = 1.8 V (high sink ports) sink ports) # # # # # # # # 6$$ 6/( ;6= 6$$ 6/( ;6= )/( ;M!= ) /( ;M!= AI BJ NRST pin Subject to general operating conditions for VDD and TA unless otherwise specified. Table 42.
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STM8L15xx8, STM8L15xR6 Electrical parameters Figure 35. Typical NRST pull-up resistance RPU vs. VDD # # # # 0ULL UP RESISTANCE ;K7= 6$$ ;6= AI Figure 36. Typical NRST pull-up current Ipu vs.
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Electrical parameters 9.3.8 STM8L15xx8, STM8L15xR6 Communication interfaces SPI1 - Serial peripheral interface Unless otherwise specified, the parameters given in Table 43 are derived from tests performed under ambient temperature, fSYSCLK frequency and VDD supply voltage conditions summarized in Section 9.3.1. Refer to I/O port characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 43.
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STM8L15xx8, STM8L15xR6 Electrical parameters Figure 38. SPI1 timing diagram - slave mode and CPHA=0 NSS input SCK Input tSU(NSS) CPHA= 0 CPOL=0 tc(SCK) th(NSS) tw(SCKH) tw(SCKL) CPHA= 0 CPOL=1 tv(SO) ta(SO) MISO OUT P UT tr(SCK) tf(SCK) th(SO) MS B O UT BI T6 OUT tdis(SO) LSB OUT tsu(SI) MOSI I NPUT B I T1 IN M SB IN LSB IN th(SI) ai14134 Figure 39.
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Electrical parameters STM8L15xx8, STM8L15xR6 Figure 40. SPI1 timing diagram - master mode (IGH .33 INPUT 3#+ /UTPUT #0(! #0/, 3#+ /UTPUT TC 3#+ #0(! #0/, #0(! #0/, #0(! #0/, TSU -) -)3/ ).0 54 TW 3#+( TW 3#+, -3 "). TR 3#+ TF 3#+ ") 4 ). ,3" ). TH -) -/3) /54054 - 3" /54 " ) 4 /54 TV -/ ,3" /54 TH -/ AI 6 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD.
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STM8L15xx8, STM8L15xR6 Electrical parameters I2C - Inter IC control interface Subject to general operating conditions for VDD, fSYSCLK, and TA unless otherwise specified. The STM8L I2C interface (I2C1) meets the requirements of the Standard I2C communication protocol described in the following table with the restriction mentioned below: Refer to I/O port characteristics for more details on the input/output alternate function characteristics (SDA and SCL). Table 44.
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Electrical parameters STM8L15xx8, STM8L15xR6 Figure 41. Typical application with I2C bus and timing diagram 6$$ 4.7k7 I2C 6$$ K7 BUS 7 3$! 7 3#, 34- , REPEATED START 34!24 tsu(STA) tw(STO:STA) SDA tr(SDA) tf(SDA) TSU 3$! START STOP TH 3$! SCL th(STA) tw(SCLH) tw(SCLL) tr(SCL) tf(SCL) 1. Measurement points are done at CMOS levels: 0.3 x VDD and 0.
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STM8L15xx8, STM8L15xR6 9.3.9 Electrical parameters LCD controller (STM8L152xx only) In the following table, data are guaranteed by Design, not tested in production. Table 45. LCD characteristics Symbol Parameter VLCD LCD external voltage VLCD0 LCD internal reference voltage 0 2.6 VLCD1 LCD internal reference voltage 1 2.7 VLCD2 LCD internal reference voltage 2 2.8 VLCD3 LCD internal reference voltage 3 3.0 VLCD4 LCD internal reference voltage 4 3.
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Electrical parameters 9.3.10 STM8L15xx8, STM8L15xR6 Embedded reference voltage In the following table, data are based on characterization results, not tested in production, unless otherwise specified. Table 46. Reference voltage characteristics Symbol Parameter Conditions Min. IREFINT Internal reference voltage consumption 1.4 TS_VREFINT(1)(2) ADC sampling time when reading the internal reference voltage 5 10 µs IBUF(1) Internal reference voltage buffer consumption (used for ADC) 13.
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STM8L15xx8, STM8L15xR6 9.3.11 Electrical parameters Temperature sensor In the following table, data are based on characterization results, not tested in production, unless otherwise specified. Table 47. TS characteristics Symbol Parameter Min. Typ. Max. Unit V90 (1) Sensor reference voltage at 90°C ±5 °C, 0.580 0.597 0.614 V ±1 ±2 °C 1.62 1.65 mV/°C 3.
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Electrical parameters STM8L15xx8, STM8L15xR6 Table 49. Comparator 2 characteristics Symbol VDDA VIN Parameter Analog supply voltage Comparator 2 input voltage range tSTART Comparator startup time td slow Propagation delay(2) in slow mode td fast Propagation delay(2) in fast mode Voffset Comparator offset error dThreshold/ Threshold voltage temperature dt coefficient ICOMP2 Conditions Current consumption(3) Min Typ Max(1) Unit 1.65 3.
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STM8L15xx8, STM8L15xR6 9.3.13 Electrical parameters 12-bit DAC characteristics In the following table, data are guaranteed by design, not tested in production. Table 50. DAC characteristics Symbol Parameter Conditions Min. Typ. Max. VDDA Analog supply voltage 1.8 3.6 VREF+ Reference supply voltage 1.8 VDDA IVREF Current consumption on VREF+ supply IVDDA TA RL(1) (2) RO CL(3) DAC_OUT (4) tsettling Current consumption on VDDA supply VREF+ = 3.
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Electrical parameters STM8L15xx8, STM8L15xR6 In the following table, data based on characterization results, not tested in production. Table 51. DAC accuracy Symbol Parameter Conditions Typ. Max. 1.5 3 1.5 3 2 4 2 4 ±10 ±25 No load DACOUT buffer OFF ±5 ±8 DACOUT buffer OFF ±1.
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STM8L15xx8, STM8L15xR6 9.3.14 Electrical parameters 12-bit ADC1 characteristics In the following table, data are guaranteed by design, not tested in production. Table 53. ADC1 characteristics Symbol Parameter VDDA Analog supply voltage VREF+ Reference supply voltage VREF- Lower reference voltage IVDDA Current on the VDDA input pin IVREF+ Current on the VREF+ input pin Conditions Min. 2.4 V ≤VDDA≤ 3.6 V Typ. Max. 1.8 3.6 2.4 VDDA 1.8 V≤VDDA≤ 2.
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Electrical parameters STM8L15xx8, STM8L15xR6 Table 53. ADC1 characteristics (continued) Symbol tS Parameter Sampling time Conditions Min. VAIN PF0/1/2/3 fast channels VDDA < 2.4 V 0.43(3)(4) VAIN PF0/1/2/3 fast channels 2.4 V ≤VDDA≤ 3.6 V 0.22(3)(4) VAIN on slow channels VDDA < 2.4 V 0.86(3)(4) VAIN on slow channels 2.4 V ≤VDDA≤ 3.6 V 0.41(3)(4) Typ. Max.
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STM8L15xx8, STM8L15xR6 Electrical parameters In the following three tables, data are guaranteed by characterization result, not tested in production. Table 54. ADC1 accuracy with VDDA = 3.3 V to 2.5 V Symbol Parameter Conditions Typ. Max. 1 1.6 Differential non linearity fADC = 8 MHz 1 1.6 fADC = 4 MHz 1 1.5 fADC = 16 MHz 1.2 2 fADC = 8 MHz 1.2 1.8 fADC = 4 MHz 1.2 1.7 fADC = 16 MHz 2.2 3.0 fADC = 8 MHz 1.8 2.5 fADC = 4 MHz 1.8 2.3 fADC = 16 MHz 1.5 2 fADC = 8 MHz 1 1.
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Electrical parameters STM8L15xx8, STM8L15xR6 Figure 42. ADC1 accuracy characteristics V V [1LSBIDEAL = REF+ (or DDA depending on package)] 4096 4096 EG 4095 4094 (1) Example of an actual transfer curve (2) The ideal transfer curve (3) End point correlation line 4093 (2) ET 7 (1) 6 5 4 ET=Total Unadjusted Error: maximum deviation between the actual and the ideal transfer curves. EO=Offset Error: deviation between the first actual transition and the first ideal one.
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STM8L15xx8, STM8L15xR6 Electrical parameters Figure 44. Maximum dynamic current consumption on VREF+ supply pin during ADC conversion Sampling (n cycles) Conversion (12 cycles) ADC clock Iref+ 700μA 300μA MS32625V1 Table 57. RAIN max for fADC = 16 MHz(1) RAIN max (kohm) Ts (cycles) Ts (µs) Slow channels Fast channels 2.4 V < VDDA < 3.6 V 1.8 V < VDDA < 2.4 V 2.4 V < VDDA < 3.3 V 1.8 V < VDDA < 2.4 V 4 0.25 Not allowed Not allowed 0.7 Not allowed 9 0.5625 0.8 Not allowed 2.0 1.
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Electrical parameters STM8L15xx8, STM8L15xR6 Figure 45. Power supply and reference decoupling (VREF+ not connected to VDDA) STM8L V REF+ 1 µF // 10 nF V DDA 1 µF // 10 nF V SSA/V REF- ai17031 Figure 46.
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STM8L15xx8, STM8L15xR6 9.3.15 Electrical parameters EMC characteristics Susceptibility tests are performed on a sample basis during product characterization. Functional EMS (electromagnetic susceptibility) Based on a simple running application on the product (toggling 2 LEDs through I/O ports), the product is stressed by two electromagnetic events until a failure occurs (indicated by the LEDs).
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Electrical parameters STM8L15xx8, STM8L15xR6 Electromagnetic interference (EMI) Based on a simple application running on the product (toggling 2 LEDs through the I/O ports), the product is monitored in terms of emission. This emission test is in line with the norm IEC61967-2 which specifies the board and the loading of each pin. Table 59. EMI data (1) Symbol SEMI Parameter Peak level Monitored frequency band Conditions VDD = 3.6 V, TA = +25 °C, LQFP80 conforming to IEC61967-2 Max vs.
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STM8L15xx8, STM8L15xR6 Electrical parameters Table 61. Electrical sensitivities Symbol LU 9.4 Parameter Class Static latch-up class II Thermal characteristics The maximum chip junction temperature (TJmax) must never exceed the values given in Table 18: General operating conditions on page 69.
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Package characteristics STM8L15xx8, STM8L15xR6 10 Package characteristics 10.1 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
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STM8L15xx8, STM8L15xR6 Package characteristics Figure 47. LQFP80, 14 x 14 mm, 80-pin low profile quad flat package C ! ! ! 0,!.% # MM '!5'% 0,!.% # ! CCC , $ K , $ $ 0). )$%.4)&)#!4)/. % % % B E 3?-% Table 63. LQFP80, 14 x 14 mm, 80-pin low profile quad flat package mechanical data inches(1) mm Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.
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Package characteristics STM8L15xx8, STM8L15xR6 Table 63. LQFP80, 14 x 14 mm, 80-pin low profile quad flat package mechanical data (continued) inches(1) mm Symbol Min Typ Max Min Typ Max e - 0.650 - - 0.0256 - L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - 0.0394 - k 0.0° 3.5° 7.0° 0.0° 3.5° 7.0° ccc - - 0.100 - - 0.0039 1. Values in inches are converted from mm and rounded to four decimal places. Figure 48.
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STM8L15xx8, STM8L15xR6 Package characteristics Figure 49. LQFP64, 10 x 10 mm, 64-pin low-profile quad flat package outline C ! ! ! 3%!4).' 0,!.% # MM '!5'% 0,!.% ! CCC # + , $ , $ $ 0). )$%.4)&)#!4)/. % % % B E 7?-%?6 1. Drawing is not to scale. Table 64. LQFP64, 10 x 10 mm, 64-pin low-profile quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.60 - - 0.0630 A1 0.05 - 0.15 0.
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Package characteristics STM8L15xx8, STM8L15xR6 Table 64. LQFP64, 10 x 10 mm, 64-pin low-profile quad flat package mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max E1 - 10.00 - - 0.3937 - e - 0.50 - - 0.0197 - K 0° 3.5° 7° 0° 3.5° 7° L 0.45 0.60 0.75 0.0177 0.0236 0.0295 L1 - 1.00 - - 0.0394 - Number of pins N 64 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 50.
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STM8L15xx8, STM8L15xR6 Package characteristics Figure 51. LQFP48 – 7 x 7 mm, 48-pin low-profile quad flat package outline C ! ! ! 3%!4).' 0,!.% # MM '!5'% 0,!.% CCC # + ! $ $ , , $ % % % B 0). )$%.4)&)#!4)/. E "?-%?6 1. Drawing is not to scale. Table 65. LQFP48 – 7 x 7 mm, 48-pin low-profile quad flat package mechanical data Symbol inches(1) millimeters Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.
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Package characteristics STM8L15xx8, STM8L15xR6 Figure 52. LQFP48 recommended footprint "?&0?6 1. Dimensions are in millimeters.
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STM8L15xx8, STM8L15xR6 Package characteristics Figure 53. UFQFPN48 7 x 7 mm, 0.5 mm pitch, package outline 0IN INDENTIFIER LASER MARKING AREA $ ! % % 4 DDD ! 3EATING PLANE B E $ETAIL 9 $ %XPOSED PAD AREA 9 $ , # X PIN CORNER 2 TYP $ETAIL : % : ! " ?-%?6 1. Drawing is not to scale. 2. All leads/pads should also be soldered to the PCB to improve the lead/pad solder joint life. 3. There is an exposed die pad on the underside of the UFQFPN package.
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Package characteristics STM8L15xx8, STM8L15xR6 Figure 54. UFQFPN48 Recommended footprint 1. Dimmensions are in millimeters.
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STM8L15xx8, STM8L15xR6 11 Ordering information scheme Ordering information scheme Table 67.
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Revision history 12 STM8L15xx8, STM8L15xR6 Revision history Table 68. Document revision history Date Revision 13-Sep-2010 1 Initial release. 20-Dec-2010 2 Updated Section 9.3.3: Supply current characteristics Updated Section 9.3.2: Embedded reset and power control block characteristics. Updated Section 9.3.3: Supply current characteristics Updated Section 9.3.13: 12-bit DAC characteristics Updated Section 9.3.14: 12-bit ADC1 characteristics Updated Section 9.3.
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STM8L15xx8, STM8L15xR6 Revision history Table 68. Document revision history (continued) Date Revision Changes Updated capacitive sensing channels and “Dynamic consumption” in Features Updated LCD feature in Table 2: High density and medium+ density STM8L15xx low power device features and peripheral counts Updated Halt mode definition in Section 3.1: Low power modes Added Bootloader Updated Section 3.12: System configuration controller and routing interface Added Section 3.
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STM8L15xx8, STM8L15xR6 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.