Datasheet

STM8L052R8 Memory and register map
Doc ID 023133 Rev 2 43/55
0x00 53C0
SPI2
SPI2_CR1 SPI2 control register 1 0x00
0x00 53C1 SPI2_CR2 SPI2 control register 2 0x00
0x00 53C2 SPI2_ICR SPI2 interrupt control register 0x00
0x00 53C3 SPI2_SR SPI2 status register 0x02
0x00 53C4 SPI2_DR SPI2 data register 0x00
0x00 53C5 SPI2_CRCPR SPI2 CRC polynomial register 0x07
0x00 53C6 SPI2_RXCRCR SPI2 Rx CRC register 0x00
0x00 53C7 SPI2_TXCRCR SPI2 Tx CRC register 0x00
0x00 53C8 to
0x00 53DF
Reserved area
0x00 53E0
USART2
USART2_SR USART2 status register 0xC0
0x00 53E1 USART2_DR USART2 data register 0xXX
0x00 53E2 USART2_BRR1 USART2 baud rate register 1 0x00
0x00 53E3 USART2_BRR2 USART2 baud rate register 2 0x00
0x00 53E4 USART2_CR1 USART2 control register 1 0x00
0x00 53E5 USART2_CR2 USART2 control register 2 0x00
0x00 53E6 USART2_CR3 USART2 control register 3 0x00
0x00 53E7 USART2_CR4 USART2 control register 4 0x00
0x00 53E8 USART2_CR5 USART2 control register 5 0x00
0x00 53E9 USART2_GTR USART2 guard time register 0x00
0x00 53EA USART2_PSCR USART2 prescaler register 0x00
0x00 53EB to
0x00 53EF
Reserved area
0x00 53F0
USART3
USART3_SR USART3 status register 0xC0
0x00 53F1 USART3_DR USART3 data register 0xXX
0x00 53F2 USART3_BRR1 USART3 baud rate register 1 0x00
0x00 53F3 USART3_BRR2 USART3 baud rate register 2 0x00
0x00 53F4 USART3_CR1 USART3 control register 1 0x00
0x00 53F5 USART3_CR2 USART3 control register 2 0x00
0x00 53F6 USART3_CR3 USART3 control register 3 0x00
0x00 53F7 USART3_CR4 USART3 control register 4 0x00
0x00 53F8 USART3_CR5 USART3 control register 5 0x00
0x00 53F9 USART3_GTR USART3 guard time register 0x00
0x00 53FA USART3_PSCR USART3 prescaler register 0x00
Table 7. General hardware register map (continued)
Address Block Register label Register name
Reset
status