Datasheet

Memory and register map STM8L052R8
36/55 Doc ID 023133 Rev 2
0x00 5164
RTC
RTC_ALRMASSRH Alarm A subsecond register high 0x00
(1)
0x00 5165 RTC_ALRMASSRL Alarm A subsecond register low 0x00
(1)
0x00 5166
RTC_ALRMASSMS
KR
Alarm A masking register 0x00
(1)
0x00 5167 to
0x00 5169
Reserved area (3 bytes)
0x00 516A
RTC
RTC_CALRH Calibration register high 0x00
(1)
0x00 516B RTC_CALRL Calibration register low 0x00
(1)
0x00 516C RTC_TCR1 Tamper control register 1 0x00
(1)
0x00 516D RTC_TCR2 Tamper control register 2 0x00
(1)
0x00 516E to
0x00 518A
Reserved area
0x00 5190 CSSLSE CSSLSE_CSR CSS on LSE control and status register 0x00
(1)
0x00 519A to
0x00 51FF
Reserved area
0x00 5200
SPI1
SPI1_CR1 SPI1 control register 1 0x00
0x00 5201 SPI1_CR2 SPI1 control register 2 0x00
0x00 5202 SPI1_ICR SPI1 interrupt control register 0x00
0x00 5203 SPI1_SR SPI1 status register 0x02
0x00 5204 SPI1_DR SPI1 data register 0x00
0x00 5205 SPI1_CRCPR SPI1 CRC polynomial register 0x07
0x00 5206 SPI1_RXCRCR SPI1 Rx CRC register 0x00
0x00 5207 SPI1_TXCRCR SPI1 Tx CRC register 0x00
0x00 5208 to
0x00 520F
Reserved area (8 bytes)
Table 7. General hardware register map (continued)
Address Block Register label Register name
Reset
status