Datasheet

Pin description STM8L052R8
26/55 Doc ID 023133 Rev 2
16 PG2/USART3_CK I/O FT
(2)
X XXHSXXPort G2
USART 3 synchronous
clock
17 PG3[TIM3_ETR] I/O FT
(2)
X XXHSXXPort G3 [Timer 3 - trigger]
9V
SSA/
V
REF-
S
Analog ground voltage /
ADC1 negative voltage reference
55 V
DD2
S IOs supply voltage
56 V
SS2
S IOs ground voltage
1
PA 0
(6)
/[USART1_CK]
(8)
/
SWIM/BEEP/IR_TIM
(7)
I/O X X X
HS
XXPort A0
[USART1 synchronous
clock]
(8)
/ SWIM input and
output /Beep output
/ Infrared Timer output
29 V
DD3
S IOs supply voltage
30 V
SS3
S IOs ground voltage
1. At power-up, the PA1/NRST pin is a reset input pin with pull-up. To be used as a general purpose pin (PA1), it can be
configured only as output open-drain or push-pull, not as a general purpose input. Refer to Section Configuring NRST/PA1
pin as general purpose output in the STM8L15x and STM8L16x reference manual (RM0031).
2. In the 5 V tolerant I/Os, protection diode to V
DD
is not implemented.
3. A pull-up is applied to PB0 and PB4 during the reset phase. These two pins are input floating after reset release.
4. In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer, weak pull-up and protection diode to V
DD
are
not implemented).
5. SEG/COM multiplexing available on medium+ and high density devices. SEG signals are available by default (see
reference manual for details).
6. The PA0 pin is in input pull-up during the reset phase and after reset release.
7. High Sink LED driver capability available on PA0.
8. [ ] Alternate function remapping option (if the same alternate function is shown twice, it indicates an exclusive choice not
aduplication of the function).
Table 4. High density value line STM8L05xxx pin description (continued)
Pin
number
Pin name
Type
I/O level
Input Output
Main function
(after reset)
Default alternate function
LQFP64
floating
wpu
Ext. interrupt
High sink/source
OD
PP