Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 64 8-Bit 16 MHz I/O number 54

June 2012 Doc ID 023133 Rev 2 1/55

STM8L052R8

Value Line, 8-bit ultralow power MCU, 64-KB Flash,

256-bytes data EEPROM, RTC, LCD, timers,USART, I2C, SPI, ADC

Data brief

Features

■ Operating conditions

– Operating power supply: 1.8 V to 3.6 V

– Temperature range: -40 °C to 85 °C

■ Low power features

– 5 low power modes: Wait, Low power run

(5.9 µA), Low power wait (3 µA), Active-halt

with full RTC (1.4 µA), Halt (400 nA)

– Dynamic power consumption:

200 µA/MHz + 330 µA

– Ultra-low leakage per I/0: 50 nA

– Fast wakeup from Halt: 4.7 µs

■ Advanced STM8 core

– Harvard architecture and 3-stage pipeline

– Max freq. 16 MHz, 16 CISC MIPS peak

– Up to 40 external interrupt sources

■ Reset and supply management

– Low power, ultra-safe BOR reset with 5

programmable thresholds

– Ultra low power POR/PDR

– Programmable voltage detector (PVD)

■ Clock management

– 32 kHz and 1 to 16 MHz crystal oscillators

– Internal 16 MHz factory-trimmed RC

– 38 kHz low consumption RC

– Clock security system

■ Low power RTC

– BCD calendar with alarm interrupt

– Digital calibration with +/- 0.5ppm accuracy

– Advanced anti-tamper detection

■ LCD: 8x24 or 4x28 w/ step-up converter

■ Memories

– 64 KB Flash program memory and

256 bytes data EEPROM with ECC, RWW

– Flexible write and read protection modes

– 4 KB of RAM

■ DMA

– 4 channels supporting ADC, SPIs, I2C,

USARTs, timers

– 1 channel for memory-to-memory

■ 12-bit ADC up to 1 Msps/28 channels

– Internal reference voltage

■ Timers

– Three 16-bit timers with 2 channels (used

as IC, OC, PWM), quadrature encoder

– One 16-bit advanced control timer with 3

channels, supporting motor control

– One 8-bit timer with 7-bit prescaler

– 2 watchdogs: 1 Window, 1 Independent

– Beeper timer with 1, 2 or 4 kHz frequencies

■ Communication interfaces

– Two synchronous serial interfaces (SPI)

–Fast I

C 400 kHz SMBus and PMBus

– Three USARTs (ISO 7816 interface + IrDA)

■ Up to 54 I/Os, all mappable on interrupt vectors

■ Development support

– Fast on-chip programming and non-

intrusive debugging with SWIM

– Bootloader using USART

LQFP64

www.st.com

Summary of content (55 pages)

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STM8L052R8 Value Line, 8-bit ultralow power MCU, 64-KB Flash, 256-bytes data EEPROM, RTC, LCD, timers,USART, I2C, SPI, ADC Data brief Features ■ ■ Operating conditions – Operating power supply: 1.8 V to 3.6 V – Temperature range: -40 °C to 85 °C Low power features – 5 low power modes: Wait, Low power run (5.9 µA), Low power wait (3 µA), Active-halt with full RTC (1.4 µA), Halt (400 nA) – Dynamic power consumption: 200 µA/MHz + 330 µA – Ultra-low leakage per I/0: 50 nA – Fast wakeup from Halt: 4.
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Contents STM8L052R8 Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Ultra low power continuum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Functional overview . . .
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STM8L052R8 Contents 3.14.3 4 3.15 Infrared (IR) interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.16 Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1 5 USART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 System configuration options .
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List of tables STM8L052R8 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. 4/55 High density value line STM8L05xxx low power device features and peripheral counts . . . 8 Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Legend/abbreviation for Table 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM8L052R8 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. High density value line STM8L05xxx device block diagram . . . . . . . . . . . . . . . . . . . . . . 10 High density value line STM8L05xxx clock tree diagram . . . . . . . . . . . . . . . . . . . . . . . . . 15 STM8L052R8 64-pin LQFP64 package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Introduction 1 STM8L052R8 Introduction This document describes the features, pinout, mechanical data and ordering information of the high density value line STM8L052R8 microcontroller with a Flash memory density of 64 Kbytes. For further details on the whole STMicroelectronics high density family please refer to Section 2.2: Ultra low power continuum. For detailed information on device operation and registers, refer to the reference manual (RM0031).
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STM8L052R8 2 Description Description The high density value line STM8L05xxx devices are members of the STM8L ultra low power 8-bit family. The value line STM8L05xxx ultra low power family features the enhanced STM8 CPU core providing increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low power operations.
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Description 2.1 STM8L052R8 Device overview Table 1.
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STM8L052R8 2.2 Description Ultra low power continuum The ultra low power value line STM8L05xxx and STM8L15xxx are fully pin-to-pin, software and feature compatible. Besides the full compatibility within the STM8L family, the devices are part of STMicroelectronics microcontrollers ultra low power strategy which also includes STM8L101xx and STM32L15xxx. The STM8L and STM32L families allow a continuum of performance, peripherals, system architecture, and features. They are all based on STMicroelectronics 0.
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Functional overview STM8L052R8 3 Functional overview Figure 1. High density value line STM8L05xxx device block diagram /3#?). /3#?/54 -(Z INTERNAL 2# /3# ?).
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STM8L052R8 3.1 Functional overview Low power modes The high density value line STM8L05xxx devices support five low power modes to achieve the best compromise between low power consumption, short startup time and available wakeup sources: ● Wait mode: The CPU clock is stopped, but selected peripherals keep running. An internal or external interrupt, event or a Reset can be used to exit the microcontroller from Wait mode (WFE or WFI mode).
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Functional overview STM8L052R8 3.2 Central processing unit STM8 3.2.1 Advanced STM8 Core The 8-bit STM8 core is designed for code efficiency and performance with an Harvard architecture and a 3-stage pipeline. It contains 6 internal registers which are directly addressable in each execution context, 20 addressing modes including indexed indirect and relative addressing, and 80 instructions.
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STM8L052R8 Functional overview 3.3 Reset and supply management 3.3.1 Power supply scheme The device requires a 1.8 V to 3.6 V operating supply voltage (VDD). The external power supply pins must be connected as follows: ● VSS1, VDD1, VSS2, VDD2, VSS3, VDD3 = 1.8 to 3.6 V: external power supply for I/Os and for the internal regulator. Provided externally through VDD pins, the corresponding ground pin is VSS. VSS1/VSS2/VSS3/VSS4 and VDD1/VDD2/VDD3 must not be left unconnected. ● ● 3.3.2 VSSA ; VDDA = 1.
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Functional overview 3.4 STM8L052R8 Clock management The clock controller distributes the system clock (SYSCLK) coming from different oscillators to the core and the peripherals. It also manages clock gating for low power modes and ensures clock robustness. Features 14/55 ● Clock prescaler: To get the best compromise between speed and current consumption the clock frequency to the CPU and peripherals can be adjusted by a programmable prescaler.
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STM8L052R8 Functional overview Figure 2. High density value line STM8L05xxx clock tree diagram #33 /3#?/54 /3#?). (3% (3% /3# -(Z 393#,+ TO CORE AND (3) (3) 2# -(Z MEMORY 393#,+ 0RESCALER ,3) ,3% 0ERIPHERAL #LOCK ENABLE BITS ,3% #,+"%%03%,; = ,3) ,3) 2# K (Z "%%0#,+ TO "%%0 )7$'#,+ TO )7$' 24##,+ 24#3%,; = /3# ?/54 /3# ?).
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Functional overview 3.6 STM8L052R8 LCD (Liquid crystal display) The LCD is only available on STM8L052xx devices. The liquid crystal display drives up to 8 common terminals and up to 24 segment terminals to drive up to 192 pixels. It can also be configured to drive up to 4 common and 28 segments (up to 112 pixels). ● Internal step-up converter to guarantee contrast control whatever VDD. ● Static 1/2, 1/3, 1/4, 1/8 duty supported. ● Static 1/2, 1/3, 1/4 bias supported.
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STM8L052R8 3.
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Functional overview 3.11.1 STM8L052R8 TIM1 - 16-bit advanced control timer This is a high-end timer designed for a wide range of control applications. With its complementary outputs, dead-time control and center-aligned PWM capability, the field of applications is extended to motor control, lighting and half-bridge driver. 3.11.2 3.11.
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STM8L052R8 3.13 Functional overview Beeper The beeper function outputs a signal on the BEEP pin for sound generation. The signal is in the range of 1, 2 or 4 kHz. 3.14 Communication interfaces 3.14.1 SPI The serial peripheral interfaces (SPI1 and SPI2) provide half/ full duplex synchronous serial communication with external devices.
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Functional overview 3.15 STM8L052R8 Infrared (IR) interface The high density value line STM8L05xxx devices contain an infrared interface which can be used with an IR LED for remote control functions. Two timer output compare channels are used to generate the infrared remote control signals. 3.
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STM8L052R8 Pin description STM8L052R8 64-pin LQFP64 package pinout 0% 0% 0# 0# 0# 0# 0# 0# 633 6 $$ 0# 0# 0' 0' 0' 0' Figure 3. 0! .
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Pin description STM8L052R8 Table 3. Legend/abbreviation for Table 4 Type Level I= input, O = output, S = power supply FT Five-volt tolerant TT 3.6 V tolerant Output HS = high sink/source (20 mA) Port and control Input configuration Output Reset state T = true open drain, OD = open drain, PP = push pull Bold X (pin state after reset release). Unless otherwise specified, the pin state is the same during the reset phase (i.e. “under reset”) and after internal reset release (i.e. at reset state).
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STM8L052R8 High density value line STM8L05xxx pin description (continued) Pin number Output wpu Ext.
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Pin description High density value line STM8L05xxx pin description (continued) Pin number Output wpu Ext.
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STM8L052R8 High density value line STM8L05xxx pin description (continued) Pin number Output wpu Ext.
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Pin description High density value line STM8L05xxx pin description (continued) Pin number Output wpu Ext.
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STM8L052R8 4.1 Pin description System configuration options As shown in Table 4: High density value line STM8L05xxx pin description, some alternate functions can be remapped on different I/O ports by programming one of the two remapping registers described in the “ Routing interface (RI) and system configuration controller” section in the STM8L15x and STM8L16x reference manual (RM0031).
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Memory and register map STM8L052R8 5 Memory and register map 5.1 Memory mapping The memory map is shown in Figure 4. Figure 4.
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STM8L052R8 Table 5. Memory and register map Flash and RAM boundary addresses Memory area Size Start address End address RAM 4 Kbytes 0x00 0000 0x00 0FFF Flash program memory 64 Kbytes 0x00 8000 0x01 7FFF 5.2 Register map Table 6.
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Memory and register map Table 6.
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STM8L052R8 Table 7.
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Memory and register map Table 7.
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STM8L052R8 Table 7.
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Memory and register map Table 7.
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STM8L052R8 Table 7.
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Memory and register map Table 7.
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STM8L052R8 Table 7.
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Memory and register map Table 7.
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STM8L052R8 Table 7.
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Memory and register map Table 7.
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STM8L052R8 Table 7.
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Memory and register map Table 7.
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STM8L052R8 Table 7.
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Memory and register map Table 7.
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STM8L052R8 Table 7.
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Memory and register map Table 8.
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STM8L052R8 Table 8.
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Interrupt vector mapping STM8L052R8 6 Interrupt vector mapping Table 9. Interrupt mapping IRQ No.
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STM8L052R8 Table 9. IRQ No.
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Package characteristics STM8L052R8 7 Package characteristics 7.1 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
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STM8L052R8 Package characteristics Figure 5. LQFP64 – 10 x 10 mm, 64 pin low-profile quad flat package outline $ CCC $ $ " " $ B , % % % , ! 0IN D -3 6 1. Drawing is not to scale. Table 10. LQFP64 – 10 x 10 mm, 64-pin low-profile quad flat package mechanical data inches(1) millimeters Symbol Min Typ A Max Min Typ 1.60 A1 0.05 A2 1.35 b 0.17 c 0.09 Max 0.0630 0.15 0.0020 0.0059 1.40 1.45 0.0531 0.0551 0.0571 0.22 0.27 0.
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Package characteristics Figure 6. STM8L052R8 Recommended footprint 48 33 0.3 49 12.7 32 0.5 10.3 10.3 64 17 1.2 1 16 7.8 12.7 ai14909 1. Dimensions are in millimeters.
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STM8L052R8 8 Ordering information scheme Ordering information scheme Figure 7. Ordering information scheme Example: STM8 L 052 R 8 T 6 Device family STM8 microcontroller Product type L = Low power Device subfamily 052: Devices with LCD Pin count R = 64 pins Program memory size 8 = 64 Kbytes of Flash memory Package T = LQFP Temperature range 6 = Industrial temperature range, –40 to 85 °C For a list of available options (e.g.
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Revision history 9 STM8L052R8 Revision history Table 11. Date Revision 20-Apr-2012 1 Initial release. 2 Modified LCD in Features, Section 3.
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STM8L052R8 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.