Datasheet
Functional overview STM8L052C6
18/52 Doc ID 022924 Rev 2
3.11.1 TIM1 - 16-bit advanced control timer
This is a high-end timer designed for a wide range of control applications. With its
complementary outputs, dead-time control and center-aligned PWM capability, the field of
applications is extended to motor control, lighting and half-bridge driver.
● 16-bit up, down and up/down autoreload counter with 16-bit prescaler
● 3 independent capture/compare channels (CAPCOM) configurable as input capture,
output compare, PWM generation (edge and center aligned mode) and single pulse
mode output
● 1 additional capture/compare channel which is not connected to an external I/O
● Synchronization module to control the timer with external signals
● Break input to force timer outputs into a defined state
● 3 complementary outputs with adjustable dead time
● Encoder mode
● Interrupt capability on various events (capture, compare, overflow, break, trigger)
3.11.2 16-bit general purpose timers
● 16-bit autoreload (AR) up/down-counter
● 7-bit prescaler adjustable to fixed power of 2 ratios (1…128)
● 2 individually configurable capture/compare channels
● PWM mode
● Interrupt capability on various events (capture, compare, overflow, break, trigger)
● Synchronization with other timers or external signals (external clock, reset, trigger and
enable)
3.11.3 8-bit basic timer
The 8-bit timer consists of an 8-bit up auto-reload counter driven by a programmable
prescaler. It can be used for timebase generation with interrupt generation on timer overflow.
3.12 Watchdog timers
The watchdog system is based on two independent timers providing maximum security to
the applications.
3.12.1 Window watchdog timer
The window watchdog (WWDG) is used to detect the occurrence of a software fault, usually
generated by external interferences or by unexpected logical conditions, which cause the
application program to abandon its normal sequence.
3.12.2 Independent watchdog timer
The independent watchdog peripheral (IWDG) can be used to resolve processor
malfunctions due to hardware or software failures.
It is clocked by the internal LSI RC clock source, and thus stays active even in case of a
CPU clock failure.