Datasheet

STM8L051F3 Memory and register map
Doc ID 022985 Rev 1 31/46
0x00 5166
RTC
RTC_ALRMASSMSKR RTC Alarm A masking register 0x00
(1)
0x00 5167 to
0x00 5169
Reserved area (3 bytes)
0x00 516A RTC_CALRH RTC Calibration register high 0x00
(1)
0x00 516B RTC_CALRL RTC Calibration register low 0x00
(1)
0x00 516C RTC_TCR1 RTC Tamper control register 1 0x00
(1)
0x00 516D RTC_TCR2 RTC Tamper control register 2 0x00
(1)
0x00 516E to
0x00 518A
Reserved area (36 bytes)
0x00 5190 CSSLSE_CSR CSS on LSE control and status register 0x00
(1)
0x00 519A to
0x00 51FF
Reserved area (111 bytes)
0x00 5200
SPI1
SPI1_CR1 SPI1 control register 1 0x00
0x00 5201 SPI1_CR2 SPI1 control register 2 0x00
0x00 5202 SPI1_ICR SPI1 interrupt control register 0x00
0x00 5203 SPI1_SR SPI1 status register 0x02
0x00 5204 SPI1_DR SPI1 data register 0x00
0x00 5205 SPI1_CRCPR SPI1 CRC polynomial register 0x07
0x00 5206 SPI1_RXCRCR SPI1 Rx CRC register 0x00
0x00 5207 SPI1_TXCRCR SPI1 Tx CRC register 0x00
0x00 5208
to
0x00 520F
Reserved area (8 bytes)
0x00 5210
I2C1
I2C1_CR1 I2C1 control register 1 0x00
0x00 5211 I2C1_CR2 I2C1 control register 2 0x00
0x00 5212 I2C1_FREQR I2C1 frequency register 0x00
0x00 5213 I2C1_OARL I2C1 own address register low 0x00
0x00 5214 I2C1_OARH I2C1 own address register high 0x00
0x00 5215 I2C1_OAR2 I2C1 own address register for dual mode 0x00
0x00 5216 I2C1_DR I2C1 data register 0x00
0x00 5217 I2C1_SR1 I2C1 status register 1 0x00
0x00 5218 I2C1_SR2 I2C1 status register 2 0x00
0x00 5219 I2C1_SR3 I2C1 status register 3 0x0X
0x00 521A I2C1_ITR I2C1 interrupt control register 0x00
0x00 521B I2C1_CCRL I2C1 clock control register low 0x00
0x00 521C I2C1_CCRH I2C1 clock control register high 0x00
Table 7. General hardware register map (continued)
Address Block Register label Register name
Reset
status