Datasheet

STM8L051F3 Functional overview
Doc ID 022985 Rev 1 17/46
3.9 System configuration controller and routing interface
The system configuration controller provides the capability to remap some alternate
functions on different I/O ports. TIM4 and ADC1 DMA channels can also be remapped.
The highly flexible routing interface controls the routing of internal analog signals to ADC1
and the internal reference voltage V
REFINT
.
3.10 Timers
Low density value line STM8L05xxx devices contain two 16-bit general purpose timers
(TIM2 and TIM3) and one 8-bit basic timer (TIM4).
All the timers can be served by DMA1.
Tabl e 3 compares the features of the advanced control, general-purpose and basic timers.
3.10.1 16-bit general purpose timers (TIM2, TIM3)
● 16-bit autoreload (AR) up/down-counter
● 7-bit prescaler adjustable to fixed power of 2 ratios (1…128)
● 2 individually configurable capture/compare channels
● PWM mode
● Interrupt capability on various events (capture, compare, overflow, break, trigger)
● Synchronization with other timers or external signals (external clock, reset, trigger and
enable)
3.10.2 8-bit basic timer (TIM4)
The 8-bit timer consists of an 8-bit up auto-reload counter driven by a programmable
prescaler. It can be used for timebase generation with interrupt generation on timer overflow.
3.11 Watchdog timers
The watchdog system is based on two independent timers providing maximum security to
the applications.
Table 3. Timer feature comparison
Timer
Counter
resolution
Counter
type
Prescaler factor
DMA1
request
generation
Capture/compare
channels
Complementary
outputs
TIM2
16-bit up/down
Any power of 2
from 1 to 128
Ye s
2
None
TIM3
TIM4 8-bit up
Any power of 2
from 1 to 32768
0