Datasheet

STM8AF52/62xx, STM8AF51/61xx Memory and register map
Doc ID 14395 Rev 9 49/110
0x00 7F81
to
0x00 7F8F
Reserved area (15 bytes)
0x00 7F90
DM
DM_BK1RE DM breakpoint 1 register extended byte 0xFF
0x00 7F91 DM_BK1RH DM breakpoint 1 register high byte 0xFF
0x00 7F92 DM_BK1RL DM breakpoint 1 register low byte 0xFF
0x00 7F93 DM_BK2RE DM breakpoint 2 register extended byte 0xFF
0x00 7F94 DM_BK2RH DM breakpoint 2 register high byte 0xFF
0x00 7F95 DM_BK2RL DM breakpoint 2 register low byte 0xFF
0x00 7F96 DM_CR1 DM debug module control register 1 0x00
0x00 7F97 DM_CR2 DM debug module control register 2 0x00
0x00 7F98 DM_CSR1 DM debug module control/status register 1 0x10
0x00 7F99 DM_CSR2 DM debug module control/status register 2 0x00
0x00 7F9A DM_ENFCTR DM enable function register 0xFF
0x00 7F9B
to 0x00
7F9F
Reserved area (5 bytes)
1. Accessible by debug module only
2. Product dependent value, see Figure 7: Register and memory map.
Table 17. CPU/SWIM/debug module/interrupt controller registers (continued)
Address Block Register label Register name
Reset
status
Table 18. Temporary memory unprotection registers
Address Block Register label Register name
Reset
status
0x00 5800
TMU
TMU_K1 Temporary memory unprotection key register 1 0x00
0x00 5801 TMU_K2 Temporary memory unprotection key register 2 0x00
0x00 5802 TMU_K3 Temporary memory unprotection key register 3 0x00
0x00 5803 TMU_K4 Temporary memory unprotection key register 4 0x00
0x00 5804 TMU_K5 Temporary memory unprotection key register 5 0x00
0x00 5805 TMU_K6 Temporary memory unprotection key register 6 0x00
0x00 5806 TMU_K7 Temporary memory unprotection key register 7 0x00
0x00 5807 TMU_K8 Temporary memory unprotection key register 8 0x00
0x00 5808 TMU_CSR
Temporary memory unprotection control and status
register
0x00