Datasheet

STM8AF52/62xx, STM8AF51/61xx Revision history
Doc ID 14395 Rev 9 109/110
18-Jul-2012
Rev 9
(continued)
Table 20: Option bytes: updated factory default setting for NOPT17;
updated footnote 1.
Table 22: Voltage characteristics: updated V
DDX
- V
DD
to V
DDX
- V
SS
.
Table 26: General operating conditions: updated V
CAP
.
Table 28: Total current consumption in Run, Wait and Slow mode.
General conditions for VDD apply, TA = -40 °C to 150 °C: updated
conditions for I
DD(RUN)
.
Table 40: I/O static characteristics: added new condition and new
max values for rise and fall time; updated footnote 2.
Section 10.3.7: Reset pin characteristics: updated text below
Figure 37: Typical NRST pull-up current Ipu vs VDD.
Figure 38: Recommended reset pin protection: updated unit of
capacitor.
Table 43: SPI characteristics: updated SCK high and low time
conditions and values.
Figure 41: SPI timing diagram - master mode: replaced ‘SCK input’
signals with ‘SCK output’ signals.
Updated Table 52: LQFP 80-pin low profile quad flat package
mechanical data, Table 53: LQFP 64-pin low profile quad flat
package mechanical data, Table 54: LQFP 48-pin low profile quad
flat package mechanical data, Table 55: LQFP 32-pin low profile
quad flat package mechanical data, and Table 56: VFQFPN 32-lead
very thin fine pitch quad flat no-lead package mechanical data.
Replaced Figure 45: LQFP 64-pin low profile quad flat package (10 x
10), Figure 47: LQFP 48-pin low profile quad flat package (7 x 7),
and Figure 49: LQFP 32-pin low profile quad flat package (7 x 7).
Added Figure 46: LQFP 64-pin recommended footprint, Figure 48:
LQFP 48-pin recommended footprint, and Figure 50: LQFP 32-pin
recommended footprint.
Updated Figure 51: VFQFPN 32-lead very thin fine pitch quad flat
no-lead package (5 x 5).
Updated Figure 52: Ordering information scheme(1).
Section 13.2.2: C and assembly toolchains: added www.iar.com.
Table 57. Document revision history (continued)
Date Revision Changes