Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsPMICsPMIC - system monitor Reset/power-on reset SOIC 8

August 2010 Doc ID 10522 Rev 10 1/43

STM690A, STM692A, STM703

STM704, STM802, STM805, STM817/8/9

5 V supervisor with battery switchover

Features

■ 5 V operating voltage

■ NVRAM supervisor for external LPSRAM

■ Chip-enable gating (STM818 only) for external

LPSRAM (7 ns max prop delay)

■ RST and RST outputs

■ 200 ms (typ) t

rec

■

Watchdog timer - 1.6 sec (typ)

■ Automatic battery switchover

■ Low battery supply current - 0.4 µA (typ)

■ Power-fail comparator (PFI/PFO)

■ Low supply current - 40 µA (typ)

■ Guaranteed RST (RST) assertion down to

= 1.0 V

■ Operating temperature:

–40 °C to +85 °C (industrial grade)

■ RoHS compliance

– Lead-free components are compliant with

the RoHS directive

1. Contact local ST sales office for availability.

TSSOP8 3 x 3 (DS)

(1)

SO8 (M)

Table 1. Device summary

Part number

Watchdog

input

Active-low

RST

(1)

Active-

high RST

Manual

reset

input

(1)

Battery

switch-

over

Power-fail

comparator

Chip-

enable

gating

Battery

freshness

seal

STM690A ✓✓ ✓✓

STM692A ✓✓ ✓✓

STM703 ✓✓✓✓

STM704 ✓✓✓✓

STM802L/M ✓✓ ✓✓

STM805L ✓✓✓✓

STM817L/M ✓✓ ✓✓ ✓

STM818L/M ✓✓ ✓ ✓✓

STM819L/M ✓✓✓✓ ✓

1. All RST and RST outputs are push-pull.

www.st.com

Summary of content (43 pages)

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STM690A, STM692A, STM703 STM704, STM802, STM805, STM817/8/9 5 V supervisor with battery switchover Features ■ 5 V operating voltage ■ NVRAM supervisor for external LPSRAM ■ Chip-enable gating (STM818 only) for external LPSRAM (7 ns max prop delay) ■ RST and RST outputs ■ 200 ms (typ) trec ■ Watchdog timer - 1.6 sec (typ) ■ Automatic battery switchover ■ Low battery supply current - 0.
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Contents STM690A/692A/703/704/802/805/817/818/819 Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 2 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.1.1 MR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.1.2 WDI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM690A/692A/703/704/802/805/817/818/819 Contents 6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 7 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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List of tables STM690A/692A/703/704/802/805/817/818/819 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. 4/43 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pin description . . . . . . . . . . . . . . . . . . .
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STM690A/692A/703/704/802/805/817/818/819 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40.
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Description 1 STM690A/692A/703/704/802/805/817/818/819 Description The STM690A/692A/703/704/802/805/817/818/819 supervisors are self-contained devices which provide microprocessor supervisory functions with the ability to non-volatize and write-protect external LPSRAM. A precision voltage reference and comparator monitors the VCC input for an out-of-tolerance condition. When an invalid VCC condition occurs, the reset output (RST) is forced low (or high in the case of RST).
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STM690A/692A/703/704/802/805/817/818/819 Figure 3. Description Logic diagram (STM818) VCC VBAT VOUT WDI RST STM818 E ECON VSS Table 2. AI07896 Signal names MR Push-button reset input WDI Watchdog input RST Active-low reset output RST Active-high reset outpu E(1) Chip-enable input ECON (1) Conditioned chip-enable output VOUT Supply voltage output VCC Supply voltage VBAT Backup supply voltage PFI Power-fail input PFO Power-fail output VSS Ground 1. STM818 Figure 4.
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Description STM690A/692A/703/704/802/805/817/818/819 Figure 5. STM703/704/819 connections SO8/TSSOP8 VOUT VCC VSS PFI 1 2 3 4 8 7 6 5 VBAT RST MR PFO AI07890 Figure 6. STM818 connections SO8/TSSOP8 VOUT VCC VSS E 1 2 3 4 8 7 6 5 VBAT RST WDI ECON AI07892 1.1 Pin descriptions 1.1.1 MR A logic low on MR asserts the reset output. Reset remains asserted as long as MR is low and for trec after MR returns high. This active-low input has an internal pull-up.
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STM690A/692A/703/704/802/805/817/818/819 1.1.5 Description VOUT When VCC is above the switchover voltage (VSO), VOUT is connected to VCC through a Pchannel MOSFET switch. When VCC falls below VSO, VBAT connects to VOUT. 1.1.6 VBAT When VCC falls below VSO, VOUT switches from VCC to VBAT. When VCC rises above VSO + hysteresis, VOUT reconnects to VCC. VBAT may exceed VCC. Connect to VCC if no battery is used. 1.1.7 E The input to the chip-enable gating circuit. Connect to ground if unused. 1.1.
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Description Table 3.
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STM690A/692A/703/704/802/805/817/818/819 Figure 8. Description Block diagram (STM703/704/819) VCC VOUT VBAT VSO COMPARE VRST COMPARE trec Generator MR PFI VPFI COMPARE RST PFO AI07898 Figure 9.
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Description STM690A/692A/703/704/802/805/817/818/819 Figure 10. Hardware hookup Regulator Unregulated Voltage VIN VCC VCC VCC VOUT VCC STM690A/692A/ 703/704/802/805/ 817/818/819 0.1 F LPSRAM E E 0.1 F WDI(1) From Microprocessor E(2) ECON(2) R1 PFI(3) PFO(3) MR(4) RST To Microprocessor NMI R2 Push-Button (5) To Microprocessor Reset VBAT AI07893 1. For STM690A/692A/802/805/817/818. 2. For STM818 only. 3. Not available on STM818. 4. For STM703/704/819. 5. Active high on STM805.
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STM690A/692A/703/704/802/805/817/818/819 2 Operation 2.1 Reset output Operation The STM690A/692A/703/704/802/805/817/818/819 Supervisor asserts a reset signal to the MCU whenever VCC goes below the reset threshold (VRST), a watchdog time-out occurs, or when the Push-button Reset Input (MR) is taken low. RST is guaranteed to be a logic low (logic high for STM805) for 0V < VCC < VRST if VBAT is greater than 1 V. Without a backup battery, RST is guaranteed valid down to VCC =1 V.
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Operation 2.4 STM690A/692A/703/704/802/805/817/818/819 Backup battery switchover In the event of a power failure, it may be necessary to preserve the contents of external SRAM through VOUT. With a backup battery installed with voltage VBAT, the devices automatically switch the SRAM to the backup supply when VCC falls. Note: When the battery is first connected without VCC power applied, the device does not immediately provide backup battery voltage on VOUT.
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STM690A/692A/703/704/802/805/817/818/819 2.5 Operation Chip-enable gating (STM818 only) Internal gating of the chip-enable (E) signal prevents erroneous data from corrupting the external CMOS RAM in the event of an undervoltage condition. The STM818 uses a series transmission gate from E to ECON (see Figure 11). During normal operation (reset not asserted), the E transmission gate is enabled and passes all E transitions.
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Operation STM690A/692A/703/704/802/805/817/818/819 Figure 12. Chip-enable waveform VCC ECON RST E VRST VBAT trec 15µs XX trec XX AI08803b 2.8 Power-fail input/output (NOT available on STM818) The Power-fail Input (PFI) is compared to an internal reference voltage (independent from the VRST comparator). If PFI is less than the power-fail threshold (VPFI), the Power-Fail Output (PFO) will go low. This function is intended for use as an undervoltage detector to signal a failing power supply.
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STM690A/692A/703/704/802/805/817/818/819 Operation Figure 13. Power-fail comparator waveform (STM817/818/819) VCC VRST VSO (or 2.4V) trec PFO (STM817/819) PFO follows PFI PFO follows PFI RST to ECON Delay (STM818) RST ECON (STM818) AI08804a Figure 14. Power-fail comparator waveform (STM690A/692A/703/704/802/805) VCC VRST 2.4V (or VSO) trec PFO PFO follows PFI PFO follows PFI RST AI08832a 2.
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Operation 2.11 STM690A/692A/703/704/802/805/817/818/819 Negative-going VCC transients The STM690A/692A/703/704/802/805/817/818/819 Supervisors are relatively immune to negative-going VCC transients (glitches). Figure 37 shows typical transient duration versus reset comparator overdrive (for which the STM690A/692A/703/704/802/805/817/818/819 will NOT generate a reset pulse). The graph was generated using a negative pulse applied to VCC, starting at VRST + 0.
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STM690A/692A/703/704/802/805/817/818/819 2.12 Operation Battery freshness seal (STM817/818/819) The battery freshness seal disconnects the backup battery from internal circuitry and VOUT until it is needed. This allows an OEM to ensure that the backup battery connected to VBAT will be fresh when the final product is put to use. To enable the freshness seal: 1. Connect a battery to VBAT 2. Ground PFO 3.
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Typical operating characteristics STM690A/692A/703/704/802/805/817/818/819 3 Typical operating characteristics Note: Typical values are at TA = 25 °C. Figure 17. VCC to VOUT on-resistance vs. temperature VCC to V OUT on-resistance ( ) 5.0 VCC = 3.0V 4.0 VCC = 4.5V VCC = 5.5V 3.0 2.0 1.0 0.0 –40 –20 0 20 40 60 80 100 120 Temperature (°C) AI10498 Figure 18. VBAT to VOUT on-resistance vs. temperature VBAT to VOUT on-resistance ( ) 160 140 120 100 80 60 VBAT = 2.0V 40 VBAT = 3.
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STM690A/692A/703/704/802/805/817/818/819 Typical operating characteristics Figure 19. Supply current vs. temperature (no load) 30 Supply Current (µA) 25 20 15 VCC = 2.7V VCC = 3.0V VCC = 3.6V VCC = 4.5V VCC = 5.5V 10 5 0 –40 –20 0 20 40 60 80 100 120 Temperature (°C) AI09141b Figure 20. Battery current vs. temperature Battery Supply Current (nA) 1000 100 VBAT = 2.0V VBAT = 3.0V VBAT = 3.6V 10 1 0.
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Typical operating characteristics STM690A/692A/703/704/802/805/817/818/819 Figure 21. VPFI threshold vs. temperature 1.270 1.265 VCC = 3.0V VCC = 4.5V VCC = 4.75V VCC = 5.5V VPFI Threshold (V) 1.260 1.255 1.250 1.245 1.240 1.235 1.230 1.225 –40 –20 0 20 40 60 80 100 120 Temperature (°C) AI09142c Figure 22. Reset comparator propagation delay vs.
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STM690A/692A/703/704/802/805/817/818/819 Typical operating characteristics Figure 23. Reset comparator propagation delay vs. temperature (VBAT = 3.0 V; STM817/818/819) 350 1v/ms Propagation Delay (µs) 300 10V/ms 250 200 150 100 50 0 –40 –20 0 20 40 60 80 100 120 Temperature (°C) AI11100 Figure 24. Power-up tREC vs. temperature 240 235 trec (ms) 230 VCC = 3.0V 225 VCC = 4.5V VCC = 5.
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Typical operating characteristics STM690A/692A/703/704/802/805/817/818/819 Figure 25. Normalized reset threshold vs. temperature Normalized Reset Threshold 1.004 1.002 1.000 0.998 0.996 –40 –20 0 20 40 60 80 100 120 Temperature (°C) AI09145b Figure 26. Watchdog time-out period vs. temperature Watchdog Time-out Period (sec) 1.90 1.85 1.80 1.75 VCC = 3.0V VCC = 4.5V VCC = 5.5V 1.70 1.65 1.
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STM690A/692A/703/704/802/805/817/818/819 Typical operating characteristics Figure 27. E to ECON on-resistance vs. temperature 60 E to ECON On-Resistance ( ) 50 40 30 VCC = 3.0V VCC = 4.5V VCC = 5.5V 20 10 0 –40 –20 0 20 40 60 80 100 120 Temperature (°C) AI09147b Figure 28. PFI to PFO propagation delay vs. temperature PFI to PFO Propagation Delay (µs) 4.0 VCC = 3.0V VCC = 3.6V 3.0 VCC = 4.5V VCC = 5.5V 2.0 1.0 0.
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Typical operating characteristics STM690A/692A/703/704/802/805/817/818/819 Figure 29. Output voltage vs. load current (VCC = 5 V; VBAT = 2.8 V; TA = 25 °C) 5.00 VOUT (V) 4.98 4.96 4.94 0 10 20 30 40 50 IOUT (mA) AI10496 Figure 30. Output voltage vs. load current (VCC = 0 V; VBAT = 2.8 V; TA = 25 °C) 2.80 2.78 VOUT (V) 2.76 2.74 2.72 2.70 2.68 2.66 0.0 0.2 0.4 0.6 IOUT (mA) 26/43 Doc ID 10522 Rev 10 0.8 1.
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STM690A/692A/703/704/802/805/817/818/819 Typical operating characteristics Figure 31. RST output voltage vs. supply voltage VRST (V) VRST VCC 4 4 3 3 2 2 1 1 0 0 VCC (V) 5 5 500ms/div AI09149b Figure 32. RST output voltage vs.
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Typical operating characteristics STM690A/692A/703/704/802/805/817/818/819 Figure 33. RST response time (assertion) 5V 1V/div VCC 4V 5V 4V RST 1V/div 0V AI09151b 5µs/div Figure 34.
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STM690A/692A/703/704/802/805/817/818/819 Typical operating characteristics Figure 35. Power-fail comparator response time (assertion) 5V 1V/div PFO 0V 1.3V PFI 500mV/div 0V 500ns/div AI09153b Figure 36. Power-fail comparator response time (de-assertion) 5V 1V/div PFO 0V 1.
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Typical operating characteristics STM690A/692A/703/704/802/805/817/818/819 Figure 37. Maximum transient duration vs. reset threshold overdrive 6000 Transient Duration (µs) 5000 4000 Reset occurs above the curve. 3000 2000 1000 0 0.001 0.01 0.1 1 10 Reset Comparator Overdrive, VRST – VCC (V) AI09156b Figure 38. E to ECON propagation delay vs. temperature E to ECON Propagation Delay (ns) 4.0 3.0 2.0 VCC = 3.0V VCC = 4.5V VCC = 5.5V 1.0 0.
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STM690A/692A/703/704/802/805/817/818/819 4 Maximum ratings Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 5.
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DC and AC parameters 5 STM690A/692A/703/704/802/805/817/818/819 DC and AC parameters This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics Tables that follow, are derived from tests performed under the measurement conditions summarized in Table 6: Operating and AC measurement conditions.
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STM690A/692A/703/704/802/805/817/818/819 DC and AC parameters Figure 40. AC testing input/output waveforms 0.8VCC 0.7VCC 0.3VCC 0.2VCC AI02568 Figure 41. MR timing waveform MR tMLRL RST (1) tMLMH trec AI07837a 1. RST for STM805. Figure 42.
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DC and AC parameters Table 7. STM690A/692A/703/704/802/805/817/818/819 DC and AC characteristics Alternative Test condition(1) Min Operating voltage TA = –40 to +85 °C 1.2(3) VCC supply current Excluding IOUT (VCC < 5.5 V) ICC VCC supply current in battery backup mode IBAT(4) VBAT supply current in battery backup mode Sym VCC , VBAT(2) VOUT1 VOUT2 Description VOUT voltage (active) VOUT voltage (battery backup) Max Unit 5.5 V 25 60 µA Excluding IOUT (VBAT = 2.3 V, VCC = 2.
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STM690A/692A/703/704/802/805/817/818/819 Table 7. Sym VOH VOH VOHB DC and AC parameters DC and AC characteristics (continued) Alternative Description Test condition(1) Min Output high voltage (RST, RST) ISOURCE = 1 mA VCC = VRST (max) 2.4 V Output high voltage (ECON) VCC = VRST (max), IOUT = 1.6 mA, E= VCC 0.8VCC V Output high voltage (PFO) ISOURCE = 75 µA, VCC = VRST (max) 0.8VCC V Output high voltage Typ Max Unit ISOURCE = 4 µA, VCC = 1.1 V, VBAT = VCC , TA = 0°C to 85°C 0.
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DC and AC parameters Table 7. Sym STM690A/692A/703/704/802/805/817/818/819 DC and AC characteristics (continued) Alternative tREC Description Test condition(1) RST pulse width Min Typ Max Unit 140 200 280 ms Push-button reset input (STM703/704/819) tMLMH tMR MR pulse width tMLMR tMRD MR to RST output delay STM703/704 150 ns STM819 1 µs STM703/704 250 ns STM819 120 ns MR glitch immunity STM819 100 ns MR pull-up resistor MR = 0 V, VCC = 5 V 45 63 85 kΩ 1.60 2.
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STM690A/692A/703/704/802/805/817/818/819 6 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
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Package mechanical data STM690A/692A/703/704/802/805/817/818/819 Figure 43. SO8 - 8-lead plastic small outline, 150 mils body width, package mechanical drawing A2 A C B ddd e D 8 E H 1 A1 L SO-A Note: Drawing is not to scale. Table 8. SO8 - 8-lead plastic small outline, 150 mils body width, package mechanical data mm inches Symbol Typ Min Max Typ Min Max A - 1.35 1.75 - 0.053 0.069 A1 - 0.10 0.25 - 0.004 0.010 B - 0.33 0.51 - 0.013 0.020 C - 0.19 0.25 - 0.
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STM690A/692A/703/704/802/805/817/818/819 Package mechanical data Figure 44. TSSOP8 - 8-lead, thin shrink small outline, 3 x 3 mm body size, outline D 8 5 c E1 1 E 4 L A1 A A2 L1 CP b Note: e TSSOP8BM Drawing is not to scale. Table 9. TSSOP8 - 8-lead, thin shrink small outline, 3 x 3 mm body size, mechanical data mm inches Symbol Typ Min Max Typ Min Max A - - 1.10 - - 0.043 A1 - 0.05 0.15 - 0.002 0.006 A2 0.85 0.75 0.95 0.034 0.030 0.037 b - 0.25 0.40 - 0.
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Part numbering 7 STM690A/692A/703/704/802/805/817/818/819 Part numbering Table 10. Ordering information scheme Example: STM690A M 6 E Device type STM690A/692A/703/704/802/805/817/818/819 Threshold voltage STM690A, STM703: blank: VRST = 4.50 V to 4.75 V STM692A, STM704: blank: VRST = 4.25 V to 4.50 V STM8xx: L: VRST = 4.50 V to 4.75 V M: VRST = 4.25 V to 4.
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STM690A/692A/703/704/802/805/817/818/819 Table 11. Part numbering Marking description Part number Reset threshold Package Topside marking STM690A 4.65 V SO8 690A STM692A 4.40 V SO8 692A STM703 4.65 V SO8 703 STM704 4.40 V SO8 704 STM802L 4.65 V SO8 802L STM802M 4.40 V SO8 802M STM805L 4.65 V SO8 805L STM817L 4.65 V SO8 817L TSSOP8 SO8 STM817M 4.40 V 817M TSSOP8 SO8 STM818L 4.65 V 818L TSSOP8 SO8 STM818M 4.40 V 818M TSSOP8 SO8 STM819L 4.
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Revision history 8 Revision history Table 12. 42/43 STM690A/692A/703/704/802/805/817/818/819 Document revision history Date Revision Changes Oct-2003 1 31-Oct-2003 1.1 22-Dec-2003 2 Reformatted; updated characteristics (cover page, Figure 2, 3, 6, 7, 8, 9, 10, 11, 12, 13, 14, 16, Table 3, 4, 7, 9, 11). 16-Jan-2004 2.1 Add typical characteristics (Figure 18, 19, 21, 22, 24, 25, 26, 27, 28, 31, 32, 33, 34, 35, 36, 37, 38). 08-Apr-2004 2.
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STM690A/692A/703/704/802/805/817/818/819 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.