Datasheet

STM690, STM704, STM795, STM802, STM804, STM805, STM806 Description
Doc ID 10519 Rev 9 9/42
1.1 Pin descriptions
1.1.1 MR (manual reset)
A logic low on MR asserts the reset output. Reset remains asserted as long as MR is low
and for t
rec
after MR returns high. This active-low input has an internal pull-up. It can be
driven from a TTL or CMOS logic line, or shorted to ground with a switch. Leave open if
unused.
1.1.2 WDI (watchdog input)
If WDI remains high or low for 1.6 s, the internal watchdog timer runs out and reset is
triggered. The internal watchdog timer clears while reset is asserted or when WDI sees a
rising or falling edge.
The watchdog function cannot be disabled by allowing the WDI pin to float.
1.1.3 RST (active-low reset)
Pulses low for t
rec
when triggered, and stays low whenever V
CC
is below the reset threshold
or when MR
is a logic low. It remains low for t
rec
after either V
CC
rises above the reset
threshold, the watchdog triggers a reset, or MR
goes from low to high.
1.1.4 RST (active-high reset - open drain)
Pulses high for t
rec
when triggered, and stays high whenever V
CC
is above the reset
threshold or when MR
is a logic high. It remains high for t
rec
after either V
CC
falls below the
reset threshold, the watchdog triggers a reset, or MR
goes from high to low.
1.1.5 PFI (power-fail input)
When PFI is less than V
PFI
or when V
CC
falls below V
SW
(2.4 V), PFO goes low; otherwise,
PFO
remains high. Connect to ground if unused.
1.1.6 PFO (power-fail output)
When PFI is less than V
PFI
, or V
CC
falls below V
SW
, PFO goes low; otherwise, PFO remains
high. Leave open if unused. Output type is push-pull.
1.1.7 V
OUT
(supply output voltage)
When V
CC
is above the switchover voltage (V
SO
), V
OUT
is connected to V
CC
through
a P-channel MOSFET switch. When V
CC
falls below V
SO
, V
BAT
connects to V
OUT
. Connect
to V
CC
if no battery is used.
1.1.8 Vccsw (V
CC
switch output)
When V
OUT
switches to battery, Vccsw is high. When V
OUT
switches back to V
CC
, Vccsw is
low. It can be used to drive gate of external PMOS transistor for I
OUT
requirements
exceeding 75 mA. Output type is push-pull.