Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsPMICsPMIC - system monitor Reset/power-on reset SO 8

August 2010 Doc ID 10519 Rev 9 1/42

STM690, STM704, STM795

STM802, STM804, STM805, STM806

3 V supervisor with battery switchover

Features

■ RST or RST outputs

■ NVRAM supervisor for external LPSRAM

■ Chip enable gating (STM795 only) for external

LPSRAM (7 ns max prop delay)

■ Manual (push-button) reset input

■ 200 ms (typ) t

rec

■

Watchdog timer - 1.6 s (typ)

■ Automatic battery switchover

■ Low battery supply current - 0.4 µA (typ)

■ Power-fail comparator (PFI/PFO)

■ Low supply current - 40 µA (typ)

■ Guaranteed RST (RST) assertion

down to V

= 1.0 V

■ Operating temperature:

–40 °C to 85 °C (industrial grade)

■ RoHS compliance

– Lead-free components are compliant with

the RoHS directive

1. Contact local ST sales office for availability.

SO8 (M)

TSSOP8 3x3 (DS)

(1)

Table 1. Device summary

Watchdog

Input

Active- low

RST

(1)

Active- high

RST

(1)

Manual

reset

input

Battery

switchover

Power-fail

comparator

Chip enable

gating

STM690T/S/R ✓✓ ✓✓

STM704T/S/R ✓✓✓✓

STM795T/S/R ✓

(2)

✓✓

STM802T/S/R ✓✓ ✓✓

STM804T/S/R ✓✓

(2)

✓✓

STM805T/S/R ✓✓

(2)

✓✓

STM806T/S/R ✓✓✓✓

1. All RST outputs push-pull (unless otherwise noted).

2. Open drain output.

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Summary of content (42 pages)

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STM690, STM704, STM795 STM802, STM804, STM805, STM806 3 V supervisor with battery switchover Features ■ RST or RST outputs ■ NVRAM supervisor for external LPSRAM ■ Chip enable gating (STM795 only) for external LPSRAM (7 ns max prop delay) ■ Manual (push-button) reset input ■ 200 ms (typ) trec ■ Watchdog timer - 1.6 s (typ) ■ Automatic battery switchover ■ Low battery supply current - 0.
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Contents STM690, STM704, STM795, STM802, STM804, STM805, STM806 Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 2 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.1.1 MR (manual reset) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.1.2 WDI (watchdog input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Contents 6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 7 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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List of tables STM690, STM704, STM795, STM802, STM804, STM805, STM806 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. 4/42 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pin description . . . . . . . . . . . .
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39.
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Description 1 STM690, STM704, STM795, STM802, STM804, STM805, STM806 Description The STM690/704/795/802/804/805/806 supervisors are self-contained devices which provide microprocessor supervisory functions with the ability to non-volatize and writeprotect external LPSRAM. A precision voltage reference and comparator monitors the VCC input for an out-of-tolerance condition. When an invalid VCC condition occurs, the reset output (RST) is forced low (or high in the case of RST).
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Figure 3. Description Logic diagram (STM795) VCC VBAT VOUT VCCSW STM795 RST E ECON VSS Table 2.
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Description STM690, STM704, STM795, STM802, STM804, STM805, STM806 Figure 4. STM690/802/804/805 connections SO8/TSSOP8 VOUT VCC VSS PFI 1 2 3 4 8 7 6 5 VBAT RST (RST)(1) WDI PFO AI08849 1. For STM804/805, reset output is active-high and open drain. Figure 5. STM704/806 connections SO8/TSSOP8 VOUT VCC VSS PFI 1 2 3 4 8 7 6 5 V BAT RST MR PFO AI08850 Figure 6.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 1.1 Pin descriptions 1.1.1 MR (manual reset) Description A logic low on MR asserts the reset output. Reset remains asserted as long as MR is low and for trec after MR returns high. This active-low input has an internal pull-up. It can be driven from a TTL or CMOS logic line, or shorted to ground with a switch. Leave open if unused. 1.1.2 WDI (watchdog input) If WDI remains high or low for 1.
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Description 1.1.9 STM690, STM704, STM795, STM802, STM804, STM805, STM806 E (chip enable input) The input to the chip enable gating circuit. Connect to ground if unused. 1.1.10 ECON (conditional chip enable) ECON goes low only when E is low and reset is not asserted. If ECON is low when reset is asserted, ECON will remain low for 15 µs or until E goes high, whichever occurs first. In the disabled mode, ECON is pulled up to VOUT. 1.1.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Figure 7. Description Block diagram (STM690/802/804/805) V CC V OUT V BAT V SO COMPARE V RST COMPARE WATCHDOG TIMER WDI trec generator (1) RST (RST) PFI V PFI COMPARE PFO AI07897 1. For STM804/805, reset output is active-high and open drain. Figure 8.
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Description Figure 9.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Description Figure 10. Hardware hookup VCCSW (2) Regulator Unregulated voltage VIN VCC VCC VOUT VCC VCC STM690/704/ 795/802/804/ 805/806 0.1 F LPSRAM E E 0.1 F WDI (1) From microprocessor E(2) ECON(2) R1 PFI (3) PFO (3) MR (4) RST To microprocessor NMI R2 Push-button To microprocessor reset VBAT AI08853 1. For STM690/802/804/805. 2. For STM795 only. 3. Not available on STM795. 4. For STM704/806.
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Operation STM690, STM704, STM795, STM802, STM804, STM805, STM806 2 Operation 2.1 Reset output The STM690/704/795/802/804/805/806 supervisor asserts a reset signal to the MCU whenever VCC goes below the reset threshold (VRST), a watchdog time-out occurs, or when the push-button reset input (MR) is taken low. RST is guaranteed to be a logic low (logic high for STM804/805) for 0 V < VCC < VRST if VBAT is greater than 1 V. Without a backup battery, RST is guaranteed valid down to VCC = 1 V.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 2.4 Operation Backup battery switchover In the event of a power failure, it may be necessary to preserve the contents of external SRAM through VOUT. With a backup battery installed with voltage VBAT, the devices automatically switch the SRAM to the backup supply when VCC falls. Note: When the battery is first connected without VCC power applied, the device does not immediately provide battery backup voltage on VOUT.
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Operation 2.5 STM690, STM704, STM795, STM802, STM804, STM805, STM806 Chip enable gating (STM795 only) Internal gating of the chip enable (E) signal prevents erroneous data from corrupting the external CMOS RAM in the event of an undervoltage condition. The STM795 uses a series transmission gate from E to ECON (see Figure 11). During normal operation (reset not asserted), the E transmission gate is enabled and passes all E transitions.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Operation Figure 12. Chip enable waveform (STM795) V CC E CON V RST V BAT ½ trec RST trec ½ trec 10 µs trec E AI08855c 2.8 Power-fail input/output (NOT available on STM795) The Power-Fail Input (PFI) is compared to an internal reference voltage (independent from the VRST comparator). If PFI is less than the power-fail threshold (VPFI), the Power-Fail Output (PFO) will go low.
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Operation STM690, STM704, STM795, STM802, STM804, STM805, STM806 Figure 13. Power-fail comparator waveform (STM690/704/802/804/805/806) V CC V RST V SW (2.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 2.10 Operation Using a SuperCap™ as a backup power source SuperCaps™ are capacitors with extremely high capacitance values (e.g., order of 0.47 F) for their size. Figure 14 shows how to use a SuperCap as a backup power source. The SuperCap may be connected through a diode to the VCC supply. Since VBAT can exceed VCC while VCC is above the reset threshold, there are no special precautions when using these supervisors with a Super-Cap. Figure 14.
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Typical operating characteristics STM690, STM704, STM795, STM802, STM804, STM805, STM806 3 Typical operating characteristics Note: Typical values are at TA = 25 °C. Figure 15. VCC to VOUT on-resistance vs. temperature V CC to V OUT on-resistance ( ) 5.0 VCC = 3.0 V 4.0 VCC = 4.5 V VCC = 5.5 V 3.0 2.0 1.0 0.0 –40 –20 0 20 40 60 80 100 120 Temperature (°C) AI10498 Figure 16. VBAT to VOUT on-resistance vs.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Typical operating characteristics Figure 17. Supply current vs. temperature (no load) 30 25 Supply current ( µ A) 20 15 VCC = 2.7 V VCC = 3.0 V VCC = 3.6 V VCC = 4.5 V VCC = 5.5 V 10 5 0 –40 –20 0 20 40 60 80 100 120 Temperature (°C) AI09141b Figure 18. Battery current vs. temperature Battery supply current (nA) 1000 100 VBAT = 2.0 V VBAT = 3.0 V VBAT = 3.6 V 10 1 0.
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Typical operating characteristics STM690, STM704, STM795, STM802, STM804, STM805, STM806 Figure 19. VPFI threshold vs. temperature 1.270 1.265 V PFI threshold (V) 1.260 1.255 VCC = 2.5 V VCC = 3.0 V VCC = 3.3 V VCC = 3.6 V 1.250 1.245 1.240 1.235 1.230 1.225 –40 –20 0 20 40 Temperature (°C) 60 80 100 120 AI09142b Figure 20. Reset comparator propagation delay vs.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Typical operating characteristics Figure 21. Power-up trec vs. temperature 240 235 t rec (ms) 230 VCC = 3.0 V 225 VCC = 4.5 V VCC = 5.5 V 220 215 210 –40 –20 0 20 40 60 Temperature (°C) 80 100 120 AI09144b Figure 22. Normalized reset threshold vs. temperature Normalized reset threshold 1.004 1.002 1.000 0.998 0.
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Typical operating characteristics STM690, STM704, STM795, STM802, STM804, STM805, STM806 Figure 23. Watchdog time-out period vs. temperature 1.90 Watchdog time-out period (s) 1.85 1.80 1.75 VCC = 3.0 V VCC = 4.5 V VCC = 5.5 V 1.70 1.65 1.60 –40 –20 0 20 40 60 80 100 120 Tempe rature (°C) AI09146b Figure 24. E to ECON on-resistance vs. temperature 60 E to E CON on-resistance ( ) 50 40 30 VCC = 3.0 V VCC = 4.5 V VCC = 5.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Typical operating characteristics Figure 25. PFI to PFO propagation delay vs. temperature 4.0 PFI to PFO propagation delay (µs) VCC = 3.0 V VCC = 3.6 V 3.0 VCC = 4.5 V VCC = 5.5 V 2.0 1.0 0.0 –40 –20 0 20 40 60 80 100 120 Temperature (°C) AI09148b Figure 26. Output voltage vs. load current (VCC = 5 V; VBAT = 2.8 V; TA = 25 °C) 5.00 V OUT (V) 4.98 4.96 4.
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Typical operating characteristics STM690, STM704, STM795, STM802, STM804, STM805, STM806 Figure 27. Output voltage vs. load current (VCC = 0 V; VBAT = 2.8 V; TA = 25 °C) 2.80 2.78 V OUT (V) 2.76 2.74 2.72 2.70 2.68 2.66 0.0 0.2 0.4 0.6 0.8 1.0 I OUT (mA) AI10497 Figure 28. RST output voltage vs.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Typical operating characteristics Figure 29. RST output voltage vs. supply voltage 5 5 V RST VCC 4 3 3 2 2 1 1 0 0 500 ms / div V CC (V) V RST (V) 4 AI09150b Figure 30. Power-fail comparator response time (assertion) 5V 1 V / div PFO 0V 1.
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Typical operating characteristics STM690, STM704, STM795, STM802, STM804, STM805, STM806 Figure 31. Power-fail comparator response time (de-assertion) 5V 1 V / div PFO 0V 1.3 V PFI 500 mV / div 0V 500 ns / div AI09154b Figure 32. Maximum transient duration vs. reset threshold overdrive 6000 Transient duration (µs) 5000 4000 Reset occurs above the curve 3000 2000 1000 0 0.001 0.01 0.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Typical operating characteristics Figure 33. E to ECON propagation delay vs. temperature E to ECON propagation delay (ns) 4.0 3.0 2.0 VCC = 3.0 V VCC = 4.5 V VCC = 5.5 V 1.0 0.
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Maximum ratings 4 STM690, STM704, STM795, STM802, STM804, STM805, STM806 Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 5.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 5 DC and AC parameters DC and AC parameters This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics tables that follow, are derived tests performed under the measurement conditions summarized in Table 6. Designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters.
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DC and AC parameters STM690, STM704, STM795, STM802, STM804, STM805, STM806 Figure 36. MR timing waveform MR RST (1) tMLRL trec tMLMH AI07837a 1. RST for STM805. Figure 37. Watchdog timing VCC RST trec tWD WDI AI07891 Table 7. Sym VCC, VBAT(2) DC and AC characteristics Alternative Description Operating voltage VOUT2 TA = –40 to +85 °C 1.1(3) Max Unit 5.5 V 60 µA Excluding IOUT (VCC < 3.6 V) 35 50 µA VCC supply current in battery backup mode Excluding IOUT (VBAT = 2.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Table 7. Sym DC and AC parameters DC and AC characteristics (continued) Alternative Test condition(1) Description Min VBAT to VOUT on-resistance ILI Typ Max Unit Ω 100 Input leakage current (MR) STM704/806 only; MR = 0 V, VCC = 3 V 20 75 350 µA Input leakage current (PFI) 0 V < VIN < VCC –20 2 +25 nA Input leakage current (WDI) 0 V < VIN < VCC –1 +1 µA STM804/805/795; 0 V < VIN < VCC(6) –1 +1 µA 0.
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DC and AC parameters Table 7. Sym STM690, STM704, STM795, STM802, STM804, STM805, STM806 DC and AC characteristics (continued) Alternative PFO output short to GND current ISC Test condition(1) Min Typ Max Unit VCC = 3.6 V, PFO = 0 V 0.1 0.75 2.0 mA Description Battery switchover VBAT > VSW VSW V VBAT < VSW VBAT V VBAT > VSW VSW V VBAT < VSW VBAT V VSW 2.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Table 7. Sym DC and AC parameters DC and AC characteristics (continued) Alternative Description E to ECON propagation delay Test condition(1) Min VCC = VRST (max) Reset to ECON high delay ISC ECON short circuit current Typ Max Unit 2 7 ns 10 VCC = 3.6 V, disable mode, ECON = 0 V 0.1 0.75 µs 2.0 mA 1. Valid for ambient operating temperature: TA = –40 to 85 °C; VCC = VRST (max) to 5.5 V; and VBAT = 2.8 V (except where noted). 2.
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Package mechanical data 6 STM690, STM704, STM795, STM802, STM804, STM805, STM806 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Package mechanical data Figure 38. SO8 – 8-lead plastic small outline, 150 mils body width, package mechanical drawing A2 A C B ddd e D 8 E H 1 A1 L SO-A Table 8. SO8 - 8-lead plastic small outline, 150 mils body width, package mechanical data mm inches Symb Typ Min Max Typ Min Max A — 1.35 1.75 — 0.053 0.069 A1 — 0.10 0.25 — 0.004 0.010 B — 0.33 0.51 — 0.013 0.020 C — 0.19 0.25 — 0.007 0.010 D — 4.
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Package mechanical data STM690, STM704, STM795, STM802, STM804, STM805, STM806 Figure 39. TSSOP8 – 8-lead, thin shrink small outline, 3 x 3 mm body size, outline D 8 5 c E1 1 E 4 L A1 A A2 L1 CP b Table 9. e TSSOP8BM TSSOP8 - 8-lead, thin shrink small outline, 3 x 3 mm body size, mechanical data mm inches Symb 38/42 Typ Min Max Typ Min Max A — — 1.10 — — 0.043 A1 — 0.05 0.15 — 0.002 0.006 A2 0.85 0.75 0.95 0.034 0.030 0.037 b — 0.25 0.40 — 0.010 0.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 7 Part numbering Part numbering Table 10. Ordering information scheme Example: STM690 T M 6 E Device type STM690/704/795/802/804/805/806 Reset threshold voltage T = STM690/704/795/805 = VRST = 3.00 V to 3.15 V STM802/804/806 = VRST = 3.00 V to 3.12 V S = STM690/704/795/805 = VRST = 2.85 V to 3.00 V STM802/804/806 = VRST = 2.88 V to 3.00 V R = STM690/704/795/805 = VRST = 2.55 V to 2.70 V STM802/804/806 = VRST = 2.59 V to 2.
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Part numbering STM690, STM704, STM795, STM802, STM804, STM805, STM806 Table 11. 40/42 Marking description Part number Reset threshold STM690T 3.075 STM690S 2.925 STM690R 2.625 STM704T 3.075 STM704S 2.925 STM704R 2.625 STM795T 3.075 STM795S 2.925 STM795R 2.625 STM802T 3.075 STM802S 2.925 STM802R 2.625 STM804T 3.075 STM804S 2.925 STM804R 2.625 STM805T 3.075 STM805S 2.925 STM805R 2.625 STM806T 3.075 STM806S 2.925 STM806R 2.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 8 Revision history Revision history Table 12. Document revision history Date Revision Changes 31-Oct-2003 1 Initial release. 22-Dec-2003 2 Reformatted; update characteristics (Figure 1, 3, 4, 11, 13, 14, 37; Table 1, 3, 4, 7, 9, 11). 16-Jan-2004 2.1 Added Typical operating characteristics (Figure 17, 18, 20 to 26, 29, 30 to 34). 07-Apr-2004 2.
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STM690, STM704, STM795, STM802, STM804, STM805, STM806 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.