STM705, STM706 STM707, STM708, STM813L 5 V supervisor Features ■ 5 V operating voltage ■ Precision VCC monitor – STM705/707/813L – 4.50 V ≤ VRST ≤ 4.75 V – STM706/708 – 4.25 ≤ VRST ≤ 4.50 V 8 1 SO8 (M) ■ RST and RST outputs ■ 200 ms (typ) trec ■ Watchdog timer - 1.6 s (typ) ■ Manual reset input (MR) ■ Power-fail comparator (PFI/PFO) ■ Low supply current - 40 µA (typ) ■ Guaranteed RST (RST) assertion down to VCC = 1.
Contents STM705, STM706, STM707, STM708, STM813L Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 2.1 MR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 WDI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
STM705, STM706, STM707, STM708, STM813L List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of figures STM705, STM706, STM707, STM708, STM813L List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. 4/33 Logic diagram (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . . .
STM705, STM706, STM707, STM708, STM813L 1 Description Description The STM705/706/707/708/813L supervisors are self-contained devices which provide microprocessor supervisory functions. A precision voltage reference and comparator monitors the VCC input for an out-of-tolerance condition. When an invalid VCC condition occurs, the reset output (RST) is forced low (or high in the case of RST).
Description STM705, STM706, STM707, STM708, STM813L Table 2. Signal names MR Push-button reset input WDI Watchdog input WDO Watchdog output RST Active-low reset output RST(1) Active-high reset output VCC Supply voltage PFI Power-fail input PFO Power-fail output VSS Ground NC No connect 1. For STM813L only. Figure 3. STM705/706/813L SO8 connections SO8 MR 1 8 WDO VCC VSS 2 7 RST (RST)(1) 3 6 WDI PFI 4 5 PFO AI08827a 1. For STM813L, reset output is active-high.
STM705, STM706, STM707, STM708, STM813L Figure 5. Description STM707/708 SO8 connections SO8 MR 1 8 RST VCC VSS 2 7 RST 3 6 NC PFI 4 5 PFO AI08828a Figure 6.
Pin descriptions 2 Pin descriptions 2.1 MR STM705, STM706, STM707, STM708, STM813L A logic low on MR asserts the reset output. Reset remains asserted as long as MR is low and for trec after MR returns high. This active-low input has an internal pull-up. It can be driven from a TTL or CMOS logic line, or shorted to ground with a switch. Leave open if unused. 2.2 WDI If WDI remains high or low for 1.6 s, the internal watchdog timer runs out and reset (or WDO) is triggered.
STM705, STM706, STM707, STM708, STM813L 2.7 Pin descriptions PFO When PFI is less than VPFI, PFO goes low; otherwise, PFO remains high. Leave open if unused. Output type is push-pull. Table 3.
Pin descriptions Figure 8. STM705, STM706, STM707, STM708, STM813L Block diagram (STM707/708) VCC COMPARE VRST RST VCC trec generator MR PFI COMPARE VPFI RST PFO AI08830 Figure 9. Hardware hookup 5V Regulator Unregulated voltage VIN VCC VCC 0.1 mF STM705 STM706 STM707 STM708 STM813L WDI(1) R1 WDO(1) To microprocessor IRQ PFI PFO To microprocessor NMI MR RST To microprocessor reset From microprocessor R2 Push-button AI08831a 1. For STM705/706/813L.
STM705, STM706, STM707, STM708, STM813L 3 Operation 3.1 Reset output Operation The STM705/706/707/708/813L supervisor asserts a reset signal to the MCU whenever VCC goes below the reset threshold (VRST), a watchdog time-out occurs (if WDO is tied to MR), or when the push-button reset input (MR) is taken low. RST is guaranteed to be a logic low (logic high for STM707/708/813L) for VCC < VRST down to VCC =1 V for TA = 0 °C to 85 °C.
Operation 3.4 STM705, STM706, STM707, STM708, STM813L Watchdog output (STM705/706/813L) When VCC drops below the reset threshold, WDO will go low even if the watchdog timer has not yet timed out. However, unlike the reset output, WDO goes high as soon as VCC exceeds the reset threshold. WDO may be used to generate a reset pulse by connecting it to the MR input. 3.5 Power-fail input/output The power-fail input (PFI) is compared to an internal reference voltage (independent from the VRST comparator).
STM705, STM706, STM707, STM708, STM813L 3.7 Operation Interfacing to microprocessors with bidirectional reset pins Microprocessors with bidirectional reset pins can contend with the STM705-708 reset output. For example, if the reset output is driven high and the micro wants to pull it low, signal contention will result. To prevent this from occurring, connect a 4.7 kΩ resistor between the reset output and the micro's reset I/O as in Figure 11. Figure 11.
Typical operating characteristics 4 STM705, STM706, STM707, STM708, STM813L Typical operating characteristics Typical values are at TA = 25 °C. Figure 12. Supply current vs. temperature (no load) 30 25 Supply current (µA) 20 15 VCC = 2.7 V VCC = 3.0 V VCC = 3.6 V VCC = 4.5 V VCC = 5.5 V 10 5 0 –40 –20 0 20 40 60 80 100 120 Temperature (°C) AI09141b Figure 13. VPFI threshold vs. temperature 1.270 1.265 V PFI threshold (V) 1.260 1.255 VCC = 2.5 V VCC = 3.0 V VCC = 3.3 V VCC = 3.
STM705, STM706, STM707, STM708, STM813L Typical operating characteristics Figure 14. Reset comparator propagation delay vs. temperature 30 28 Propagation delay (µs) 26 24 22 20 18 16 14 12 10 –40 –20 0 20 40 60 80 100 120 Temperature (°C) AI09143b Figure 15. Power-up trec vs. temperature 240 235 t rec (ms) 230 VCC = 3.0 V 225 VCC = 4.5 V VCC = 5.
Typical operating characteristics STM705, STM706, STM707, STM708, STM813L Figure 16. Normalized reset threshold vs. temperature Normalized reset threshold 1.004 1.002 1.000 0.998 0.996 –40 –20 0 20 40 60 80 100 120 Temperature (°C) AI09145b Figure 17. Watchdog time-out period vs. temperature 1.90 Watchdog time-out pe riod (s) 1.85 1.80 1.75 VCC = 3.0 V VCC = 4.5 V VCC = 5.5 V 1.70 1.65 1.
STM705, STM706, STM707, STM708, STM813L Typical operating characteristics Figure 18. PFI to PFO propagation delay vs. temperature 4.0 PFI to PFO propagation delay (µs) VCC = 3.0 V VCC = 3.6 V 3.0 VCC = 4.5 V VCC = 5.5 V 2.0 1.0 0.0 –40 –20 0 20 40 60 80 100 120 Temperature (°C) AI09148b Figure 19. Output voltage vs. load current (VCC = 5 V; TA = 25 °C) 5.00 V OUT (V) 4.98 4.96 4.
Typical operating characteristics STM705, STM706, STM707, STM708, STM813L Figure 20. RST output voltage vs. supply voltage V RST (V) VRST VCC 4 4 3 3 2 2 1 1 0 0 500 ms / div V CC (V) 5 5 AI09149b Figure 21. RST output voltage vs.
STM705, STM706, STM707, STM708, STM813L Typical operating characteristics Figure 22. RST response time (assertion) 5V 1 V / div VCC 4V 5V 4V RST 1V/div 0V 5 µs / div AI09151b 1. VRST = 4.603 V at 25 °C.
Typical operating characteristics STM705, STM706, STM707, STM708, STM813L Figure 23. RST response time (assertion) 5V VCC 4V 1 V / div 4V RST 1 V / div 0V 5 µs / div AI09152b 1. VRST = 4.603 V at 25 °C. Figure 24. Power-fail comparator response time (assertion) 5V 1 V / div PFO 0V 1.
STM705, STM706, STM707, STM708, STM813L Typical operating characteristics Figure 25. Power-fail comparator response time (de-assertion) 5V 1 V / div PFO 0V 1.3 V PFI 500 mV / div 0V AI09154b 500 ns / div Figure 26. Maximum transient duration vs. reset threshold overdrive 6000 Transient duration (µs) 5000 4000 Reset occurs above the curve 3000 2000 1000 0 0.001 0.01 0.
Maximum ratings 5 STM705, STM706, STM707, STM708, STM813L Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4.
STM705, STM706, STM707, STM708, STM813L 6 DC and AC parameters DC and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics tables that follow, are derived from tests performed under the measurement conditions summarized in Table 5. Designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters. Table 5.
DC and AC parameters STM705, STM706, STM707, STM708, STM813L Figure 29. MR timing waveform MR RST (1) tMLRL trec tMLMH AI07837a 1. RST for STM805. Figure 30.
STM705, STM706, STM707, STM708, STM813L Table 6. Sym DC and AC characteristics Description VCC Operating voltage ICC VCC supply current ILI DC and AC parameters Test condition(1) Min 1.2 Typ Max Unit 5.5 V 25 60 µA (2) Input leakage current (MR) 4.5 V < VCC < 5.5 V 75 125 300 µA Input leakage current (PFI) 0 V < VIN < VCC –25 2 +25 nA 120 160 µA Input leakage current (WDI) WDI = VCC, time average WDI = GND, time average –20 VIH Input high voltage (MR) 4.5 V < VCC < 5.
DC and AC parameters Table 6. STM705, STM706, STM707, STM708, STM813L DC and AC characteristics Sym Description Test condition(1) Min Typ Max Unit STM705/707/813L 4.50 4.65 4.75 V STM706/708 4.25 4.40 4.
STM705, STM706, STM707, STM708, STM813L 7 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
Package mechanical data STM705, STM706, STM707, STM708, STM813L Figure 31. SO8 – 8-lead plastic small outline, 150 mils body width, outline A2 A C B ddd e D 8 E H 1 A1 L SO-A 1. Drawing is not to scale. Table 7. SO8 - 8-lead plastic small outline, 150 mils body width, pack. mech. data mm inches Symbol Typ Min Max Typ Min Max A — 1.35 1.75 — 0.053 0.069 A1 — 0.10 0.25 — 0.004 0.010 B — 0.33 0.51 — 0.013 0.020 C — 0.19 0.25 — 0.007 0.010 D — 4.80 5.
STM705, STM706, STM707, STM708, STM813L Package mechanical data Figure 32. TSSOP8 – 8-lead, thin shrink small outline, 3 x 3 mm body size, outline D 8 5 c E1 1 E 4 A1 A L A2 L1 CP b e TSSOP8BM 1. Drawing is not to scale. Table 8. TSSOP8 - 8-lead, thin shrink small outline, 3 x 3 mm body size, mechanical data mm inches Symbol Typ Min Max Typ Min Max A — — 1.10 — — 0.043 A1 — 0.05 0.15 — 0.002 0.006 A2 0.85 0.75 0.95 0.034 0.030 0.037 b — 0.25 0.40 — 0.010 0.
Part numbering 8 STM705, STM706, STM707, STM708, STM813L Part numbering Table 9. Ordering information scheme Example: STM705 M 6 E Device type and reset threshold voltage STM705/707/813L = VRST = 4.50 V to 4.75 V STM706/708 = VRST = 4.25 V to 4.50 V RST pulse width Blank = 140 to 280 ms A(1) = 160 to 280 ms Package M = SO8 DS(2) = TSSOP8 Temperature range 6 = –40 to 85 °C Shipping method E = ECOPACK® package, tubes F = ECOPACK® package, tape and reel 1.
STM705, STM706, STM707, STM708, STM813L 9 Revision history Revision history Table 11. Document revision history Date Revision Changes Sep-2003 1 31-Oct-2003 1.1 12-Dec-2003 2 16-Jan-2004 2.
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