Datasheet
Table Of Contents
- Table 1. Device summary
- 1 Description
- Figure 1. Logic diagram (STM6821/6822/6823)
- Figure 2. Logic diagram (STM6321/6322/6824/6825)
- Table 2. Signal names
- Figure 3. STM6822/6823 SOT23-5 connections
- Figure 4. STM6821 SOT23-5 connections
- Figure 5. STM6322/6825 SOT23-5 connections
- Figure 6. STM6321/6824 SOT23-5 connections
- 1.1 Pin descriptions
- 2 Operation
- 3 Typical operating characteristics
- Figure 15. VCC-to-reset output delay vs. temperature
- Figure 16. Supply current vs. temperature
- Figure 17. MR-to-reset output delay vs. temperature
- Figure 18. Normalized power-up trec vs. temperature
- Figure 19. Normalized reset threshold voltage vs. temperature
- Figure 20. Normalized power-up watchdog timeout period
- Figure 21. Voltage output low vs. ISINK
- Figure 22. Voltage output high vs. ISOURCE
- Figure 23. Maximum transient duration vs. reset threshold overdrive
- 4 Maximum ratings
- 5 DC and AC parameters
- 6 Package mechanical data
- 7 Package mechanical data
- 8 Part numbering
- 9 Revision history
STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM6825 Package mechanical data
Doc ID 11110 Rev 12 23/31
Reset threshold
temperature coefficient
40
ppm/
C
Push-button reset input
t
MLMH
t
MR
MR pulse width 1 µs
t
MLRL
t
MRD
MR to RST output delay 500 ns
MR
glitch immunity 100 ns
MR
pull-up resistor 35 52 75 kΩ
Watchdog timer
t
WD
(6)
Watchdog timeout period 1.12 1.60 2.24 s
WDI pulse width
(7)
V
CC
≥ 3.0 V 50 ns
1. Valid for ambient operating temperature: T
A
= –40 to 85 °C; V
CC
= 4.5 to 5.5 V for “L/M” versions; V
CC
= 2.7 to 3.6 V for
“T/S/R” versions; and V
CC
= 1.2 to 2.75 V for “Z/Y” version (except where noted).
2. V
CC
(min.) = 1.0 V for T
A
= 0 to +85 °C.
3. WDI input is designed to be driven by a three-state output device. To float WDI, the “high-impedance mode” of the output
device must have a maximum leakage current of 10 µA and a maximum output capacitance of 200 pF. The output device
must also be able to source and sink at least 200 µA when active.
4. WDI is internally serviced within the watchdog period if WDI is left unconnected.
5. The leakage current measured on the RST pin is tested with the reset asserted (output high impedance).
6. Other t
rec
and watchdog timings are offered. Minimum order quantities may apply. Contact local sales office for availability.
7. For V
CC
< 3.0 V, t
WD
(min.) = 100 ns.
Table 6. DC and AC characteristic (continued)
Sym-
bol
Alter-
native
Description Test condition
(1)
Min. Typ. Max. Unit