Datasheet
Table Of Contents
- Table 1. Device summary
- 1 Description
- Figure 1. Logic diagram (STM6821/6822/6823)
- Figure 2. Logic diagram (STM6321/6322/6824/6825)
- Table 2. Signal names
- Figure 3. STM6822/6823 SOT23-5 connections
- Figure 4. STM6821 SOT23-5 connections
- Figure 5. STM6322/6825 SOT23-5 connections
- Figure 6. STM6321/6824 SOT23-5 connections
- 1.1 Pin descriptions
- 2 Operation
- 3 Typical operating characteristics
- Figure 15. VCC-to-reset output delay vs. temperature
- Figure 16. Supply current vs. temperature
- Figure 17. MR-to-reset output delay vs. temperature
- Figure 18. Normalized power-up trec vs. temperature
- Figure 19. Normalized reset threshold voltage vs. temperature
- Figure 20. Normalized power-up watchdog timeout period
- Figure 21. Voltage output low vs. ISINK
- Figure 22. Voltage output high vs. ISOURCE
- Figure 23. Maximum transient duration vs. reset threshold overdrive
- 4 Maximum ratings
- 5 DC and AC parameters
- 6 Package mechanical data
- 7 Package mechanical data
- 8 Part numbering
- 9 Revision history
